Lead memory simulation team to develop innovated solutions to solve design challenges in performance, power, and area; to increase verification coverage and reduce design cycle. Which includes,• Developed an innovated solution to include local OCV (On-Chip-Variation) in single pass simulation with fast-spice and digital simulators.• Developed a fully automated simulation benchmarking method to compare the simulators in accuracy, runtime, memory usage with various simulation settings.• Using Machine Learning to analyze and predict the simulation memory usage and runtime• Utilize the cloud/on-prem computing to increase simulation throughputs• Applying ML on coverage to reduce runtime and increase coverages.• Automated simulation re-run on the failed regression and result comparison with Pass/Fail• Standardized simulation verification environment• Reduced runtime with various techniques from EDA tools, Compute hardware, design partition/modeling.• Managing the technical projects by working with world-wide design, verification, product, and CAD engineers.Lead the semi-custom digital implementation design flow. This flow includes both front-end and back-end design tools. Like, Synthesis, STA, Place&Route, cell characterization and Formality.