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Vincent Karam Email & Phone Number

SerDes Project Manager and Analog Design at Ciena
Location: Ottawa, Ontario, Canada 12 work roles 3 schools
1 work email found @solantro.com LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

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Current company
Role
SerDes Project Manager and Analog Design
Location
Ottawa, Ontario, Canada
Company size

Who is Vincent Karam? Overview

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Quick answer

Vincent Karam is listed as SerDes Project Manager and Analog Design at Ciena, a with 10127 employees, based in Ottawa, Ontario, Canada. AeroLeads shows a work email signal at solantro.com and a matched LinkedIn profile for Vincent Karam.

Vincent Karam previously worked as SerDes Project Manager & Analog Design at Ciena and ASIC Design Manager at Leddartech. Vincent Karam holds Master’S Degree, Electronics from Carleton University.

Company email context

Email format at Ciena

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{first_initial}{last}@solantro.com
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AeroLeads found 1 current-domain work email signal for Vincent Karam. Compare company email patterns before reaching out.

Profile bio

About Vincent Karam

Development of state-of-the-art Analog/Mixed Signal based Integrated Circuits (ICs).

Listed skills include Ic, Analog, Cmos, Semiconductors, and 18 others.

Current workplace

Vincent Karam's current company

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Ciena
Ciena
SerDes Project Manager and Analog Design
Ottawa, ON, CA
Website
Employees
10127
AeroLeads page
12 roles

Vincent Karam work experience

A career timeline built from the work history available for this profile.

Serdes Project Manager And Analog Design

Ottawa, On, Ca

Serdes Project Manager & Analog Design

Current

Hanover, Maryland, Us

Dec 2022 - Present

Asic Design Manager

Quebec, Canada, Ca

• ASIC Design Manager leading a team of Digital, ASIC Architecture and Test Engineering• Project Manager for LeddarTech's flagship LiDAR ASIC, LCA3• Project Manager for LeddarTech's next generation LiDAR ASIC, LCA4

Sep 2021 - Dec 2022

Chip Prime & Senior Staff Analog Ic Design Engineer

Camarillo, Ca, Us

• Project Lead & Chip Prime for Photonic Control ASIC.• Analog Lead for PAM4 4x56G Transceiver ICs in Data Centers.• 400 Gb/s Transceivers. Signal Integrity Products (SIP) group.

Jun 2018 - Sep 2021

Staff Design Engineer

Camarillo, Ca, Us

Aug 2016 - May 2018

Senior Ic Design Engineer

• Designing industry leading IC's for the next generation power conversion market.• Ultra low offset (20µV) Fully differential Auto-Zero Offset Stabilised Opamp (0.18µm, 220MHz BW).• Co-designed Integer-N Phase Locked Loop (PLL) using spare devices (200MHz, Ring-Osc, metal change).• Chip prime for Solantro’s most advanced power controller device, top level assembly, simulation, packaging, continuous interaction with IC design, layout, software, systems and marketing groups.• High Speed Voltage Divider Op-Amp (100MHz BW, indirect compensation).• Transmitter (TX) for galvanically isolated communication chip using On-Off Keying.• ESD and Pad ring construction (qualified for 4KV and latch-up immunity).

Jun 2013 - Aug 2016

Senior Circuit Analysis Engineer

Chipworks

• Patent analysis, infringement investigation and documentation.• Reverse engineering semiconductor circuits (PLLs, DLLs, Timers, Regulators, LCD, Bandgap, RF transceiver, Clock Generator, Amplifier, ESD)• Team lead and inventor for innovative Patent-to-Product search tool.• Patent mining and statistical analysis, patent priority rating. • Research and Development lead for internal software project/company initiative.• Marketing (Chipworks’ first infographic, patent analysis sales presentations)

Feb 2011 - Jun 2013

Analog Ic Design Engineer

Kaben Wireless Silicon Inc.

• 144MHz Delay Locked Loop (DLL)• 320MHz 4-bit Phase Interpolator and Phase Shifter in 90nm CMOS• Power management blocks in 0.13µm CMOS: Bandgap, LDO (30mA), POR (Capacitor Based), Iref (Wilson), Vbias.• VCO Auto-Calibration• 3.6GHz VCO tuning design• Fuse Programmable Interface (FPI) in 0.18µm BiCMOS

Dec 2007 - Feb 2011

Analog Designer

Ca

• Bandgap voltage reference for a dual DC-DC converter (LTR-2700). • 2-bit, 3-bit and 4-bit Flash ADC blocks for 12-bit 120Ms/s ADC in TSMC 0.18µm CMOS.• Layout and post layout extraction simulations.

Feb 2005 - Nov 2007

Rfic Student Designer

Spacebridge Semiconductor
Jan 2002 - Aug 2002
Team & coworkers

Colleagues at Ciena

Other employees you can reach at ciena.com. View company contacts for 10127 employees →

3 education records

Vincent Karam education

Master’S Degree, Electronics

Carleton University

Bachelor’S Degree, Electrical Engineering

Carleton University

High School

Ashbury College
FAQ

Frequently asked questions about Vincent Karam

Quick answers generated from the profile data available on this page.

What company does Vincent Karam work for?

Vincent Karam works for Ciena.

What is Vincent Karam's role at Ciena?

Vincent Karam is listed as SerDes Project Manager and Analog Design at Ciena.

What is Vincent Karam's email address?

AeroLeads has found 1 work email signal at @solantro.com for Vincent Karam at Ciena.

Where is Vincent Karam based?

Vincent Karam is based in Ottawa, Ontario, Canada while working with Ciena.

What companies has Vincent Karam worked for?

Vincent Karam has worked for Ciena, Leddartech, Semtech, Solantro Semiconductor Corp, and Chipworks.

Who are Vincent Karam's colleagues at Ciena?

Vincent Karam's colleagues at Ciena include Parthesh Mittal, Sheldon B., Soares Claudiney, Bouchaib Naji, and Michael Hoffman.

How can I contact Vincent Karam?

You can use AeroLeads to view verified contact signals for Vincent Karam at Ciena, including work email, phone, and LinkedIn data when available.

What schools did Vincent Karam attend?

Vincent Karam holds Master’S Degree, Electronics from Carleton University.

What skills is Vincent Karam known for?

Vincent Karam is listed with skills including Ic, Analog, Cmos, Semiconductors, Mixed Signal, Rf, Asic, and Circuit Design.

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