Vlad Bara Email & Phone Number

Oradea, Bh, Ro

SONiC networking operating system (Linux-Debian based) development.- Python, Redis, Docker, system architecture, Linux development, driver PoE development- Worked on the device configuration system, the Linux user-group system, and PoE. Consisted of implementing daemons that run on top of Redis databases. Required tinkering with Docker, Redis and a broader operating system knowledge.- Implemented a PoE driver based on the MCU documentation and the IEEE 802.3AF / AT / BT .

Networking Software Stack (code base of 10 million lines of code written in C) for Cambium Networks (Outsourcing Luxoft) routed switches.Architected and improved the control plane of (ARM-Marvell) networking chips, touching on Ethernet, RFC, IEEE protocols: - Closely worked with the Routing Engine, Equal-cost-multi-path (ECMP) and implemented an original ARP-based route selection feature, resulting in increased throughput and network stability. Led technical architecture discussions with the team.- Replatforming to Marvell AlleyCat 5X chip - Porting legacy code to new driver and chip. Fixed areas of Port Transmission, Routing interfaces, CPU packet trapping, Dynamic ARP Inspection, Policy Configuration Table (PCL) system- Adjusted the interaction with the Kernel networking stack, to implement an ARP overwrite feature. Explored the kernel events, communication interfaces, and states- Solved diverse issues across all the networking stack, such as Ethernet functionality, port-channel/LACP, STP (RSTP/MSTP/PVRST), Linux networking stack (kernel), SNMP, L3 interfaces, ACLs, packet decomposition and processing, VLANs, OSPF module, RIP module, ARP inspection (DAI), DHCP snooping, etc. Used testing software and hardware (IXIA, Wireshark, Linux utilities, GNU debugger & gdb server)Exceeding my level in C and Computer SciencePracticed anything from MCUs, hardware architecture, and RTOS, to in-depth Data Structures and algorithms, Multi-threading, C++, etc.

Oradea, Bihor, România

Designed (SystemVerilog) a Single-Precision Floating-Point ALU compliant with the RISC-V ISA and the IEEE Floating Point Standard.Functional testing/coverage through test benches. Lightly familiarized with UVM & Verilator.