We are working to evaluate ‘vsdflow’ on RISC-V SHAKTI processor. Our initial results have been very promising, which made us to believe that we can tape-out180nm process (target is 16nm) using opensource rtl-2-gds ‘vsdflow’. Shakti project is a family of 6 processors based on RISC-VISA – 3 base processors (E-class, C-class, I-class) and 3 multi-core processors(M-class, S-Class, H-class). E-class (low-end) cores use 3-stage pipe-line and available in 32-bit and 64-bit versions, that will run at 200MHz. C-class (high-end) cores use a 5-stage pipeline and target speeds up to 800MHz, which can be customized to run up to 2GHz.This provides a unique opportunity for both entities to take up all existing taped-out cores and benchmark using ‘vsdflow’. We have planned at-least 6 tape-outs (mostly govt. projects, not official yet) for 2019, and if things go right, we will see at-most 6 tape-outs using ‘vsdflow’. It doesn’t stop there; the entire flow will be deployed to all engineering colleges using VSD’s online VLSI training infrastructure.

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VSD is supporting a community where more than millions of people learn, share, and work together to build a chip. At VSD, where we always promote “open source,” we’re promoting about a proven method of collaborating to create technology. The freedom to see the design, to learn from it, to ask questions and offer improvements: This is the open source way.