Experienced RTL Design Engineer with a strong background in designing, implementing, and verifying digital systems on FPGA platforms. Proficient in System Verilog coding, adept at utilizing Lattice Semiconductor platforms and Intel Altera design tools, and skilled in RTL design, simulation, and synthesis. Demonstrated expertise in analyzing system requirements, developing engineering specifications, and collaborating effectively with cross-functional teams. Dedicated to delivering innovative, high-quality solutions to achieve project objectives within challenging timelines.