William (Bill) Warner

William (Bill) Warner Email and Phone Number

DSP Systems Architect at Aviva Links @ Aviva Links
William (Bill) Warner's Location
Maple Ridge, British Columbia, Canada, Canada
William (Bill) Warner's Contact Details

William (Bill) Warner work email

William (Bill) Warner personal email

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About William (Bill) Warner

Innovative and dedicated Systems Design and Electrical Engineer with extensive practical and theoretical experience in digital/adaptive/intelligent data and signal processing. I have managed and led teams of technical experts to deliver solutions to complex problems, working under set deadlines, and successfully patenting multiple supporting inventions. Most recently in a small start-up, I delivered technical solutions to critical problems necessary for product viability, quickly adapting to shifting market and product focus. I have 29 patents granted or pending in multiple sectors including: Oil & Gas non-conventional drilling and Fracking Completions; Internet communications infrastructure equipment; and WLAN & Cellular communications systems. As a seasoned inventor and team leader in contract, start-up, and billion-dollar corporate environments, I can provide the needed expertise and leadership to successfully deliver product developments.Professional Skills: Computational & Theoretical- Digital communication theory, signal modulation / demodulation, frequency and clock recovery - Data acquisition and Sensor interfacing, Nyquist sampling theory, ADC/DAC enob and signal integrity noise floor issues and limits- Time domain and Frequency domain Adaptive signal processing, including linear and non-linear signal equalization, and reduction of ambient acoustic noiseProfessional Skills: Physical & Practical- Experienced on a wide range of numerical platforms, including: Matlab, LabVIEW, C, etc on high-powered micro-processors; C on low powered micro-controllers; custom RTL designs in ASIC- Sensor-based Intelligent systems in which sensors are unreliable- RF propagation issues and remedies- System development and testing environments requiring use of oscilloscopes, logic analyzers, spectrum analyzers, signal generators, etc.Professional Skills: Managerial- Mentorship & team leading, including task and responsibility delegation, conflict resolution, and idea synthesis- Efficient problem solving through cognitive flexibility, anticipating shortfalls, and development of evaluation strategies - Experience in Intellectual Property development process, from conception to granting

William (Bill) Warner's Current Company Details
Aviva Links

Aviva Links

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DSP Systems Architect at Aviva Links
William (Bill) Warner Work Experience Details
  • Aviva Links
    Dsp Systems Architect
    Aviva Links Apr 2021 - Present
    Vancouver, British Columbia, Canada
    At Aviva Links, we are building advanced connectivity solutions for next generation autonomous driving systems featuring highly scalable, very high data-rate and secure end-to-end connectivity solutions to fuel the needs of AI processors and advanced sensors.
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  • Hotrock Labs
    Founder
    Hotrock Labs Mar 2017 - Present
    Maple Ridge, British Columbia
    Mobile Apps for Android and iOS. Our inaugural product is ScrollTuner for Android. This is a chromatic musical tuner that analyzes and records your tuning performance while you play real music then lets you go back and review on a graphic display.
  • Cold Bore Technology
    Principal - Dsp
    Cold Bore Technology Sep 2014 - Apr 2021
    As the company’s sole specialist in signal processing and analysis, developed and delivered solutions to critical problems that were limiting product viability in each of the three major sequential product focuses of Cold Bore since it’s inception: 1. Sonic Telemetry for MWD downhole data communication: significantly improved the noise floor operation of sonic sensors; uncovered a fundamental flaw in the down-hole transmitter and redesigned the surface receiver to accommodate; improved receiver algorithm design and demonstrated significantly increased depth of operation during field trials on commercial oil drilling rigs; developed and implemented a Bluetooth based means of interfacing to the drill-pipe mounted telemetry receiver to stationary equipment. Patents filed and granted.2. Sliding Sleeve Fracking Completions Operations: designed and implemented an ambient noise reduction algorithm using multiple sonic sensors to enable detection of weak down-hole sonic events, providing a substantial advantage over competitors. Also developed and implemented method of tracking down-hole collet travel using pressure transient analysis. These systems are still being deployed and providing a revenue stream. Patents pending.3. Zipper-Frac Completions Operations: developed a fault-tolerant sensor-based method of tracking and recording critical operation activities of multiple wells on a well-site. This is a critical/core component of Cold Bore’s primary product and revenue stream, SmartPAD. Patent pending.
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  • Pmc-Sierra
    Principal
    Pmc-Sierra Jan 2013 - Nov 2013
    Burnaby, Bc
    DSP / Digital system architect for PMC's latest generation SerDes operating at up to 28Gbps, working closely with the analog architecture and design team. Responsible for overall receiver architecture strategy, equalization, adaptation, timing recovery, and BER performance projections using detailed end-to-end system simulation model of anticipated SerDes links.Strategic investigations into analog equalization architecture alternatives for advanced SerDes products.Strategic investigations into DSP methods that will benefit PMC's wireless product roadmap.Examples of some key accomplishments: A) Selected to be the primary technical DSP lead for the overall architecture design of PMC's latest generation SerDes operating at up to 28Gbps. The new architecture significantly reduces power consumption relative to previous generation, achieving Best-In-Class power performance.B) Developed strategy and algorithm for adapting an analog equalization filter to provide the necessary BER performance over operational data rates ranging from 5Gbps to 28Gbps. A key feature prevents timing recovery from fighting with filter adaptation. Patents filed: US #13/957,852 and #13/941,902C) Conducted performance analysis of end-to-end SerDes link, using customer specified backplane and cable channel models, to demonstrate viability of 1E-18 BER target using a combination of transient and statistical methods in a Matlab environment. Detailed simulation/analysis results were successfully reviewed internally and with customers.
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  • Pmc-Sierra
    Technical Advisor
    Pmc-Sierra Sep 2006 - Jan 2013
    Burnaby, Bc
    Primary DSP & system technical lead for new product feasibility and development in multiple product/technology areas including: - NRZ SerDes for SATA/SAS, Fibre Channel, GE, 10GE, PCIe, etc...- 1Gbps and 10Gbps GPON/EPON receivers- 40Gbps coherent optical receiver, using Dual-Polarization QPSK modulation over 3000km of standard SMF fiber- non-linear distortion compensation for wireless transceiver productsExamples of some key accomplishments: A) Comprehensively reviewed and evaluated, as primary DSP technical lead, critical third-party IP for a 40Gbps 3000km SMF fiber communication product using Dual-Polarization QPSK modulation with a coherent receiver architecture resulting in timely delivery of RTL to the integration team.B) Determined and designed required support circuitry needed to interface the DP-QPSK DSP IP with in-house analog circuity (ADC & AGC) in time for implementation within target schedule by the DSP vendor. Support circuitry included: Rx signal AGC with integrated Sigma-Delta DAC; ADC calibration enhancements for non-static signal characteristics. Patent filed: US #13/833,401C) Provided design sensitivity guidance to partner component manufacturer by understanding their part characteristics (particularly their optical LO), incorporating into the channel impairment model, and evaluating effect on performance. In addition to specific design targets, general sensitivity trends were identified and provided to vendor for purposes of design optimizationD) Supported marketing efforts of DP-QPSK optical transceiver product by presenting comprehensive technical reviews of the core DSP IP to key executives of a tier-1 telecommunications equipment and services companyE) Improved the effective linearity of a modeled RF receiver chain by more than 10dB by developing an all-digital non-linearity distortion compensation circuit. Patent filed: US #13/834,133
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  • Pmc-Sierra
    Leader
    Pmc-Sierra Dec 2000 - Sep 2006
    Burnaby, Bc
    Manager and technical leader for a small team (up to 5) of DSP engineers on variety of wireline and wireless physical layer projects.Technical leader for mid-size team (up to 15) of DSP engineers on wireless physical layer projects.
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  • Pmc-Sierra
    Sr. Engineer
    Pmc-Sierra Jul 2000 - Dec 2000
    Burnaby, Bc
    Develop advanced DSP based methods to improve I/Q RF Transmitter performance for RF HPA Pre-Distortion system.
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  • Datum Telegraphic
    Member Of Technical Staff
    Datum Telegraphic Jul 1997 - Jul 2000
    Vancouver, Bc
    Acquired by PMC-Sierra in 2000Develop Tx I/Q impairment compensation circuit and adaptation algorithm for RF HPA Pre-Distortion system.Design consulting services to wireless equipment and services providers.
  • Sfu Continuing Education
    Instructor
    Sfu Continuing Education 1996 - 1997
    Burnaby, Bc
    Instructor (part-time) for seminar course on Mobile Communications

William (Bill) Warner Skills

Digital Signal Processors Wireless Asic Analog Ic System Architecture Mixed Signal Semiconductors Embedded Systems Debugging Hardware Architecture Mobile Communications Serdes Fec Ofdm Fiber Optics Java Eclipse

William (Bill) Warner Education Details

Frequently Asked Questions about William (Bill) Warner

What company does William (Bill) Warner work for?

William (Bill) Warner works for Aviva Links

What is William (Bill) Warner's role at the current company?

William (Bill) Warner's current role is DSP Systems Architect at Aviva Links.

What is William (Bill) Warner's email address?

William (Bill) Warner's email address is bi****@****rra.com

What schools did William (Bill) Warner attend?

William (Bill) Warner attended The University Of British Columbia, University Of Waterloo.

What skills is William (Bill) Warner known for?

William (Bill) Warner has skills like Digital Signal Processors, Wireless, Asic, Analog, Ic, System Architecture, Mixed Signal, Semiconductors, Embedded Systems, Debugging, Hardware Architecture, Mobile Communications.

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