Software development of an all-digital simulation environment in C++/Qt for an anti-UAS system

Lead software efforts to develop a full stack application to control Software Defined Radios (SDRs) and Digital Radio Frequency Memories (DRFMs), inclusive of the following technologies:• Creation and configuration of custom PetaLinux operating systems (root file system, first-stage boot loader, network configuration, custom drivers and applications, etc.) for custom SDR/DRFM electronics to be run on Xilinx Zynq Ultrascale+ hard core processors• Creation and development of network-linked, browser-based graphical user interfaces (GUIs) using HTML/CSS/JavaScript (JS) and REST API to receive user data for lower-level embedded processing (register configuration, DMA, memory access, etc.), display register status, log in to password-protected debug modes, send/delete/receive files from host servers to/from the target embedded system, etc.• Development of backends for the same GUIs using Python Flask frameworks to establish static IP’s and hook REST API calls made from JS/Ajax functions to Python scripts and C code for the initiation of direct memory access (DMA) data transfers and register configuration on the ZYNQ Ultrascale+• Regular use of Ubuntu Linux, Secure Shell server/client (SSH), Xilinx Viitis/Vivado, VSCodeLead firmware engineer/architect for GHz/MHz hit detection telemetry systems on Lockheed Martin’s MDA Targets and Countermeasures program, including architecture creation and development, VHDL development/simulation/test for a Xilinx FPGA, LVDS communication, and benchtop testingEmbedded software development for STM32-series MCUs inclusive of peripheral API development (GPIO, ADC, DMA, DMAMUX, UART, USB) as well as application code in control of Vector Network Analyzers (VNAs) for RF applicationsEmbedded software and firmware development involving gigabit ethernet data transfers of IR and visible camera input to be used on the next flight of Northrop Grumman’s Pegasus

Principal engineer shaping architectures and writing custom modules (Python, C, VHDL) for both known and proprietary communication protocols for Next Gen Re-entry Vehicle electronics, e.g., SPI, UART, etc.Rapid prototyping of embedded software to support emerging technologies for the redesign of Next Generation Nuclear ICBMsRegular use of development boards featuring Xilinx family FPGAs for testing and prototyping software/firmware designsFault detection/isolation, trending, data wrangling using Python (Pandas library)Regular use of Postman API platform in conjunction with PostgreSQL DBUsing RESTful API with Python and PostmanRegular use of Ubuntu/WSL2Familiarity with package managers such as yarn and npmDevelops methods to achieve timing closure for architectures with multiple different clock domainsDevelops Python scripts for GUI development and for running test scenarios on FPGAsModifies BFM blocks and test scenarios in VHDL to verify firmware using OSVVMFirmware/software testing, debugging and verification using unit testing, testbenching, HWIL, Vivado ILA and Vitis IDERegular use of the Xilinx toolchain, Questasim, Visual Studio Code, bash and GitApplication and driver development in C for FreeRTOS and bare metal targets including STM family microprocessors and Xilinx IP processor coresExperience with RISC architectures including ARM Cortex and MircroblazeRTOS tracing and analysis using SEGGERUtilizes Xilinx IP Cores including but not limited to AXI4, AXI-Stream, AXI-FIFO, RISC processor, memory, custom VHDL etc.

Develops and debugs custom VHDL IP coresDevelops and simulates VHDL testbenches using ModelsimPython and Tcl script developmentGit repository managementElectrical engineering technical lead for High-powered microwave (HPM) directed energy weaponConducts trade studies and takes part in architectural design of embedded electronics for HPM

Missile Defense and Space SystemsTakes lead electrical role in avionics projectile effortsVHDL/firmware development Architecture of FPGA/SoC IP cores and communications interfaces (ADC, DDR3 memory, UART, SPI, etc.) on satellite avionics hardwareWrites, performs, and troubleshoots tests for satellite/projectile avionics hardware and cable harnessesTests and validates hardware to ensure system designs meet operational and functional requirementsResearches specific technology advances for potential hardware application to specific program needsDesigns mixed-signal, high/low-speed electronics (Ethernet, SGMII, RS-422, MIL-STD-1553, power conditioning circuitry, etc.) using Altium toolchainConducts trade studies on electrical components based on program requirements and goalsCollaborates with other engineering disciplines to develop requirements and validate feasibility of design

Electrical Power Distribution Engineering

Conducted research at two UCSB labs investigating processes of microcontact printing a cell adhesion promoter (liquid polymer) onto multielectrode arrays for the measurement of neuronal electrical stimuli. The process included designing polydimethylsiloxane (PDMS) stamps with AutoCAD, making PDMS stamps for the microcontact printing, making neruron adhesion more robust by adding a hydrophobic array pretreatment, plating hippocampal neurons onto multielectrode arrays, taking high quality microscopy photos, and recording nueronal electrical signals with the 2100 multichannel system.Research was presented in both poster session and public talk attended by professors and graduate researchers at UCSB Nanosystems Institute.