William Salcedo
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William Salcedo Email & Phone Number

CEO at Partcl
Location: New York City Metropolitan Area, United States 14 work roles 3 schools
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✓ Verified Jul 2026 3 data sources Profile completeness 86%

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Current company
Role
CEO
Location
New York City Metropolitan Area, United States
Company size

Who is William Salcedo? Overview

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Quick answer

William Salcedo is listed as CEO at Partcl, a with 2 employees, based in New York City Metropolitan Area, United States. AeroLeads shows a matched LinkedIn profile for William Salcedo.

William Salcedo previously worked as Research Assistant at Stanford University and SM ASIC Design Efficiency Engineer Intern at Nvidia. William Salcedo holds Master Of Science - Ms, Electrical Engineering from Stanford University.

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Email format at Partcl

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Partcl

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Profile bio

About William Salcedo

Hello! My name is Will and I am a M.S. Student at Stanford Studying Electrical Engineering. My interests primarily lie in electronic design automation, VLSI, and computer architecture.My previous experiences include two tapeouts, a hardware startup that had its product deployed, and many other personal projects.

Current workplace

William Salcedo's current company

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Partcl
Partcl
CEO
California, United States
Website
Employees
2
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14 roles

William Salcedo work experience

A career timeline built from the work history available for this profile.

Ceo

California, United States

Research Assistant

Current

Novel Computing Systems Lab• AMS system verification tools.• AI Generated Hardware Design.

Jun 2023 - Present

Sm Asic Design Efficiency Engineer Intern

Santa Clara, California, United States

• Develop script to gain performance insights from retiming data.• Triage Failing Performance Tests.• GPU Architecture & GPU Implementation.

Jun 2024 - Sep 2024

Customer Support Consultant

• Supported customers with physical design.• Advised Implementation within Caravel Harness.• Advised usage of OpenLANE physical design flow.

Apr 2024 - Jun 2024

Founder

Chipworks.App

(defunct) Online platform for OpenLanehttps://www.chipworks.app/Designed backend and containerized OpenLane2

Dec 2023 - Feb 2024

Graduate Student Researcher

Ithaca, New York, United States

• Worked in Zhang research group assisting in implementation of a graph processing accelerator.• Ported graph accelerator kernel of Pagerank to Catapult HLS.• Developed PyMTL3 model of DRAM using DRAMsim3.

Feb 2023 - May 2023

Digital Subteam Lead

Ithaca, Ny

• Founding member of C2S2, an undergraduate led team which uses open-source tools to develop and tape-out custom hardware accelerators for use in interdisciplinary research projects. • Designed and verified an open-source Fast Fourier Transform (FFT) ASIC for passive, low-power data collection and external interfacing with the SPI protocol.• Implemented an open-source, pipelined, fixed-point FFT core generator using SystemVerilog.

Aug 2022 - May 2023

Chief Product Officer

Ithaca, New York, United States

• Co-founded a startup which develops IoT devices for property managers to detect maintenance faults within their residential rental properties. • Coordinated a small team of engineers to develop the product including customer discovery, specification formation, PCB design, mechanical design, firmware development, and supply chain operations. • Manufactured over 500 units of the product, deployed over 100 units, and obtained a patent.

Nov 2020 - May 2023

Hardware Development Engineering Intern, Base Building Electrical Engineering

Seattle, Wa

• Worked with Engineers in the Base Building Electrical Engineering team.• Created new system for characterizing electrical maintenance issues within Amazon warehouses. • Assisted engineers with site walk-downs, inspections and outages.• Assisted with the implementation of a sensor-based health monitoring system.

May 2022 - Aug 2022

Team Lead

Ithaca, New York, United States

• Led a team of 33 undergraduates in building an autonomous sailboat.• Developed timelines and held members accountable using a new work management system.• Oversaw the creation of new mechanical and electronic systems.• Mentored students to build a new PCB and embedded system using a Raspberry Pi.• Drove team to win fourth place at the International Autonomous Sailboat Regatta.

May 2021 - Jun 2022

Navigation Team Member

Ithaca, New York Area

• Designed electronic systems to control an autonomous sailboat. • Redesigned power systems to support a lithium-ion battery. • Designed a Raspberry Pi shield to integrate the boat's electronics. • Developed firmware to read and filter sensor data and control servo motors.

Oct 2019 - Jun 2021

Nuclear Engineering Intern

Salem, Nj

Jun 2021 - Aug 2021

Engineering Technician

Lake Como, Nj, United States

Jul 2019 - Aug 2019
3 education records

William Salcedo education

Master Of Science - Ms, Electrical Engineering

Activities and Societies: Open Source Silicon at Stanford (OS3) - Tech Advisor

Bachelor Of Science - Bs, Electrical And Computer Engineering

Activities and Societies: Marching Band, Acacia Cum Laude

FAQ

Frequently asked questions about William Salcedo

Quick answers generated from the profile data available on this page.

What company does William Salcedo work for?

William Salcedo works for Partcl.

What is William Salcedo's role at Partcl?

William Salcedo is listed as CEO at Partcl.

Where is William Salcedo based?

William Salcedo is based in New York City Metropolitan Area, United States while working with Partcl.

What companies has William Salcedo worked for?

William Salcedo has worked for Partcl, Stanford University, Nvidia, Efabless Corporation, and Stanford University School Of Engineering.

How can I contact William Salcedo?

You can use AeroLeads to view verified contact signals for William Salcedo at Partcl, including work email, phone, and LinkedIn data when available.

What schools did William Salcedo attend?

William Salcedo holds Master Of Science - Ms, Electrical Engineering from Stanford University.

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