Student Electrical Engineer
Kirkland, Washington, United States
Primary responsibility was to design a control circuit (DO-254 non-compliant) that implement a sequence of operations in accordance with high-level behavioral documentation for a University of Washington Capstone project sponsored by Astronics AES.• Architected and implemented a Mealy Sequential Circuit using discrete logic gates and volatile D Flip-Flops• Sourced and specified appropriate IC package components for the board designers for efficient layout• Employed a cost-effective design tool, Logisim, to iteratively prototype and design a deterministic finite state machine (FSM)Secondary responsibility was to analyze and modify a discrete analog ground fault circuit interrupter (GFCI). • Applied AC and DC circuit analysis to analyze and validate the GFCI to UL 943 specifications for a minimum differential current of 5.0mA RMS with a maximum 150ms trip time• Revised the sensing circuit by updating resistor ladder values for the dual op amp comparator and gain resistor for a differential operational amplifier Tertiary responsibility was testing the GFCI and FSM production level circuit card assembly; utilized soldering stations, power supplies, decade box, oscilloscopes, multimeters, and function generators.Prepared and presented project materials in a Preliminary Design Review and Critical Design Review to management and stakeholders.