Responsibilities:----EVB SCH design and review of the PCB layout.----PMU/GPADC/PLL/Audio HW test cases verification and issue debug;---- ATE test cases support.----Output of ESD/EOS test method and test fail samples FA.----Supporting SW BSP driver debug; Training and supporting of CE.----Customer fail samples FAProject experience:RDA8809E2 2G mobile phone chip baseband HW verification and debugRDA8850E 3G mobile phone chip baseband HW verification… Show more Responsibilities:----EVB SCH design and review of the PCB layout.----PMU/GPADC/PLL/Audio HW test cases verification and issue debug;---- ATE test cases support.----Output of ESD/EOS test method and test fail samples FA.----Supporting SW BSP driver debug; Training and supporting of CE.----Customer fail samples FAProject experience:RDA8809E2 2G mobile phone chip baseband HW verification and debugRDA8850E 3G mobile phone chip baseband HW verification and debugAcquisition:----Futher understanding of Mobile phone chipset internal architecture, especially of the Audio /PMU/clock blocks.----Close cooperation and communication with chip designers and BSP engineers.----Further understanding of chip-level ATE test cases definition, test limits setting and debugging.----By debugging speaker DC issue, further understanding of the effect of semiconductor process parameters on performance.----By debugging FM interference issue, further understanding of the system self-interference, PLL stability and design of SW workaround.----Assisting the fault locating of ESD/EOS fail samples, further understanding of the chip internal architecture. Show less

Responsibilities: --The board size and placement evaluation in cooperation with mechanic, ID, antenna and peripherals. --Output of the PCB layout & placement guide; feasibility evaluation of new adding modules; --Calculation of the phone’s power dissipation/current in different work modes; ---Evaluation of thermal risk --Schematic output; ---FXN EJRD testing and debugging support in BB /Energy management/ Thermal domains. Project experience: --HW design… Show more Responsibilities: --The board size and placement evaluation in cooperation with mechanic, ID, antenna and peripherals. --Output of the PCB layout & placement guide; feasibility evaluation of new adding modules; --Calculation of the phone’s power dissipation/current in different work modes; ---Evaluation of thermal risk --Schematic output; ---FXN EJRD testing and debugging support in BB /Energy management/ Thermal domains. Project experience: --HW design of the Intel XMM6310 platform (DBB XG631+ ABB AG610) feature phone;Acquisition: --Further understanding of the system current estimation, standby/ working time calculation (eg. antenna mismatch current calculation); --Preliminary knowledge of the process of thermal simulation and risk evaluation; --Further understanding of the placement’s impact to antenna desense and radiated spurious emission; --Coordination of several technical domains in the placement and routing; --By debugging Wifi High-PER issue, further understanding of the shielding method and principle of the DC/DC inductor EMI. Show less

Responsibilities:STE U8500/8520 smart phone platform system(CPU DB8500/20 series + PMU AB8500/05 series, Android OS) HW validation and debugging; --Customer project (Samsung, HTC, Ontim…) feedback issues debugging; --Customer project (Samsung) HW design on site support; --HW design of the new chip development board. --HW validation and debugging of the DDR/Clock/Boot/DVFS related test cases; --HW validation of platform BOM cost-down scheme; --Debugging… Show more Responsibilities:STE U8500/8520 smart phone platform system(CPU DB8500/20 series + PMU AB8500/05 series, Android OS) HW validation and debugging; --Customer project (Samsung, HTC, Ontim…) feedback issues debugging; --Customer project (Samsung) HW design on site support; --HW design of the new chip development board. --HW validation and debugging of the DDR/Clock/Boot/DVFS related test cases; --HW validation of platform BOM cost-down scheme; --Debugging of the DB feedback issues from customer projects (DB IC design team liaison); --On site support of Samsung project PCB design, cooperate in the PI simulation validation of layout; --HW design of the new chip development board (DDR interface and arrangement of DB GPIO/external interfaces).Acquisition --Insight of the chip-level architecture of clock and power supplies, and the principle of low power functions; --Insight of the principle of PI simulation and the guidance in PCB layout design; --Preliminary knowledge of the process of chip design/validation/quality analysis; --Improve the ability of multi-sector cooperation and communication with customers. Show less

Responsibilities: --Earlier stage survey of the selection of the application processors; --Selection of the peripheral function module chips; --Whole hardware design of system;Design of schematic files; --Output the PCB layout guidelines, and working with the PCB Engineer; --Design of simple CPLD program --Hardware debugging, assisting ESD&EMI debugging and software debugging --Great attention to the sleeping power-saving strategy… Show more Responsibilities: --Earlier stage survey of the selection of the application processors; --Selection of the peripheral function module chips; --Whole hardware design of system;Design of schematic files; --Output the PCB layout guidelines, and working with the PCB Engineer; --Design of simple CPLD program --Hardware debugging, assisting ESD&EMI debugging and software debugging --Great attention to the sleeping power-saving strategy debugging;Project experience:Xinwei Double mode industrial PDAAcquisition --Familiar with the functional peripherals of the PDA; --Further understanding of the whole procedure and specification of the product design, and manufacturability; --Familiar with the developing and simulating environment of the Xilinx CPLD --Guiding the PCB layout topology and High Speed circuit design by Hyperlynx simulation; --EMI design and debugging for the low frequency band (340M/400M) products; --Familiar with ESD protection design --Understanding of the principle of the low power design in the system/HW/SW level; Show less