Xiaoning Wang Email & Phone Number
@apple.com
3 phones found area 617 and 650
LinkedIn matched
Who is Xiaoning Wang? Overview
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Xiaoning Wang is listed as Technical Program Manager at Apple at Apple, a with 218112 employees, based in Dublin, California, United States. AeroLeads shows a work email signal at apple.com, phone signal with area code 617, 650, and a matched LinkedIn profile for Xiaoning Wang.
Xiaoning Wang previously worked as Technical Program Manager at Apple and Test and Reliability Engineer at Rayvio. Xiaoning Wang holds Phd, Micro-Electro-Mechanical Systems (Mems) from Boston University.
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AeroLeads found 1 current-domain work email signal for Xiaoning Wang. Compare company email patterns before reaching out.
About Xiaoning Wang
• Self-motivated, experienced, and independent Engineer with a strong technical expertise in Light Emitting Diodes (LEDs) and high-volume semiconductor manufacturing operations of wafer fab, packaging, metrology, electrical/optical device testing.• Strong leadership, team/project management, and communication skills through collaborations with cross-functional teams world-wide, as well as managing a team of engineering technicians, to resolve complex yield, quality, and technical challenges, from leading-edge R&D projects to fast-paced high-volume semiconductor device manufacturing.• Highly skilled in big data analysis and failure analysis for LED device performance, yield, and reliability improvements.• PhD in Mechanical Engineering with 12+ years of cleanroom/laboratory experiences in micro- and nano-scale material characterization and device design/fabrication.• Published/presented in 30+ peer-reviewed scientific journals and/or international conferences.
Listed skills include Mems, Matlab, Comsol, Microfabrication, and 20 others.
Xiaoning Wang's current company
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Xiaoning Wang work experience
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Test And Reliability Engineer
• Developed automated data acquisition and analysis systems using R, Excel VBA and Access, for production line yield and reliability data analysis, as well as to drive next generation product introduction (NPI), with tightened electrical, optical, and reliability specifications while maintaining/improving production yield;• Utilized SPC and GR&R to ensure the accuracy and consistency of manual and automated electrical and optical test stations;• In charge of designing/improving testing infrastructures for various devices and form factors, to enable high-throughput wafer qualification, on-going reliability testing (ORT) of finished products from contract manufacturers (CM), as well as highly accelerated life tests (HALT). Recorded/analyzed test data for over 1/4 billion device-hours;• Developed predicative models to project LED lifetime for operating conditions from accelerated aging tests, as well as using Weibull statistical analysis and Six Sigma principles to evaluate overall product reliability with industry-leading performance;• Directed the new product qualification planning and execution during product development and launch, including temperature, humidity, ESD, vibration, power cycle, etc.;• Qualified new components and material from suppliers to ensure quality and reliability;• Performed root-cause analysis of electrical, optical, and mechanical failures from customer returns, out-of-spec parts from CM partners, as well as internal STRIFE testing failures, to strategically identify failure mechanisms and device weak points, and consequently prioritize the corresponding implementation of containment, corrective, and preventative actions to significantly reduce infant mortality rate in packaged devices by >10X;
Chip Development Scientist / Process Engineer
• Designed and implemented modifications to production equipment to reduce precious metal consumption by >50%;• Quadrupled flip-chip SAC solderability by developing electroplated thick Ni/Au contact pad with low stress;• Developed new metal stacks for optimal ohmic contacts to both n-AlGaN and p-GaN, with superior contact quality and process stability, which resulted in a ~50% reduction in median device operating voltage by ~50%, improving wall-plug efficiency (WPE) and wear-out failure rates;• Improved equipment and process stability through design of experiments (DOE), and implementation of rigorous statistical process control (SPC) monitoring;• Successfully transitioned from chip development to highly manufacturable (DFm) 3-inch sapphire wafer LED volume production, as well as die shrinks reducing chip size by 75% while maintaining equal, or better, electrical and optical performance and lifetime. Together the yield improvements and die shrinks increased the average sellable chips per wafer by >6X;• For next generation LED chip design, developed UVC-transparent dielectric material, and UVC-reflective mirrors to maximize light extraction efficiency (LEE), quadrupling peak external quantum efficiency (EQE) of packaged devices;
Fab Manager
• Managed up to 6 operators daily, directing workflows through front and back end of the wafer fab, coordinating with equipment engineering group on both repairs and routine maintenance, setting priorities to meet production targets, as well as helping the engineering team to achieve R&D goals;• Ensured strict adherence to all Federal, State, and RayVio environmental and safety regulations, and implemented corrective/preventative actions;• Increased annual chip production volume by >40X, and revenue by >7X, without adding new equipment or personnel;• Implemented workflows improvements throughout the wafer fab to reduce final visual yield loss by >60%, and increased wafer throughput by ~50%;• Coordinated with sales and marketing teams, as well as LED packaging CM partners to establish production schedules based on product requirements, market demands and raw material supplies, to ensure timely delivery of high-quality products;• Weekly report and update of production status, planning, and quality issues to management and engineering teams;• Drafted work instruction and SOPs for various processes-of-record and equipment, and trained operators and technicians to perform production and R&D tasks;
Postdoctoral Researcher
• Developed self-assembling techniques for large area uniform diatom (purified from live microalgae or diatomaceous earth) frustule monolayers, with nano-scale features, for dye synthesized solar cell and surface enhanced Raman spectroscopy applications.• Developed mercury vapor sensing devices based on amalgam-forming gold electrode with high sensitivity and portability.
Graduate Research Fellow
• Characterized the mechanical properties of silicon oxy-nitride and silicon oxy-carbide thin films using nanoindentation.• Developed deposition techniques of various iron oxide thin films using DC/RF reactive sputtering;• Characterized various material properties of the iron oxide thin films using SQUID, SEM, XRD and EDX;• Designed, fabricated, and tested micro/nano iron oxide particle arrays with different structural configurations for multispectral and functional contrast agents used in magnetic resonance imaging;• Synthesized monodispersed tantalum oxide and gold nanoparticles, and developed patterning techniques forPEG-DA hydrogel particles for use in multispectral and functional computed tomography contrast agents.• Developed a simple 3-step anodization process for aluminum thin films directly grown on substrates with superior adhesion and uniformity. Achieved wafer-level uniform nanoporous AAO membrane with controllable pore size and spacing, ranging from ~90nm to 220nm;• Developed a nanomanufacturing platform based on template-assisted nanoimprint lithography using AAO membranes for cost effective and high throughput fabrication of size and shape specific polymeric nanoparticles.
Graduate Student Advisor
• Mentored four teams of senior undergraduate students with their final design projects in four consecutive academic years respectively;• Proposed the research topics of these projects and helped the students to understand them, and to get started with conducting their own research with literature search and planning specific aims of each project;• Guided the students through their experimental design, and trained them on all the necessary equipment/procedures,, and helped the students with the research proposal and final report writing, as well as preparing for the final presentation.
Graduate Teaching Fellow
• Teaching assistant for course ME 310 Instrumentation and Theory of Experiments, responsible for preparing and guiding junior/senior undergraduate students through different lab sessions, giving short lectures and grading lab reports on electrical, mechanical, fluidic and thermal dynamics experiments.
Undergraduate Research Assistant
• Designed and fabricated a silicon based micro-needle array for biological fluid extraction and in situ analysis, optimized the DRIE process parameters for high aspect-ratio anisotropic silicon etching;• Investigated and developed an improved structural releasing method for silicon dioxide sacrificial layers in MEMS devices using buffered oxide etchant and glycerin additive.
Colleagues at Apple
Other employees you can reach at apple.com. View company contacts for 218112 employees →
Moises Antepara
Colleague at AppleGuayaquil, Guayas, Ecuador
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Kapil Singh
Colleague at AppleDelhi, India
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Annabel Marshes
Colleague at AppleWoodley, England, United Kingdom
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AO
Ali Okutucu
Colleague at AppleHatay, Türkiye, Turkey
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Shima Mosa
Colleague at AppleCairo, Egypt
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Carolyn Boccignone
Colleague at AppleSanta Clara, California, United States
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Iwona Sudomirska
Colleague at AppleSanta Pola, Valencian Community, Spain
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PK
Pawel Kaczy
Colleague at AppleEmmeloord, Flevoland, Netherlands
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CA
Carole Arbonnier
Colleague at AppleMontpellier, Occitanie, France
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Chris Ortuno
Colleague at AppleLivermore, California, United States
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Xiaoning Wang education
Phd, Micro-Electro-Mechanical Systems (Mems)
Master Of Science, Mechanical Engineering
Bachelors Of Science In Microelectronics, School Of Electrical Engineering And Computer Science
Frequently asked questions about Xiaoning Wang
Quick answers generated from the profile data available on this page.
What company does Xiaoning Wang work for?
Xiaoning Wang works for Apple.
What is Xiaoning Wang's role at Apple?
Xiaoning Wang is listed as Technical Program Manager at Apple at Apple.
What is Xiaoning Wang's email address?
AeroLeads has found 1 work email signal at @apple.com for Xiaoning Wang at Apple.
What is Xiaoning Wang's phone number?
AeroLeads has found 3 phone signal(s) with area code 617, 650 for Xiaoning Wang at Apple.
Where is Xiaoning Wang based?
Xiaoning Wang is based in Dublin, California, United States while working with Apple.
What companies has Xiaoning Wang worked for?
Xiaoning Wang has worked for Apple, Rayvio, Boston University, and Institute Of Microelectronics, Peking University.
Who are Xiaoning Wang's colleagues at Apple?
Xiaoning Wang's colleagues at Apple include Moises Antepara, Kapil Singh, Annabel Marshes, Ali Okutucu, and Shima Mosa.
How can I contact Xiaoning Wang?
You can use AeroLeads to view verified contact signals for Xiaoning Wang at Apple, including work email, phone, and LinkedIn data when available.
What schools did Xiaoning Wang attend?
Xiaoning Wang holds Phd, Micro-Electro-Mechanical Systems (Mems) from Boston University.
What skills is Xiaoning Wang known for?
Xiaoning Wang is listed with skills including Mems, Matlab, Comsol, Microfabrication, Nanotechnology, Mathematica, Characterization, and Spectroscopy.
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