Y Y Email and Phone Number
--more than 6 years working experience in 300mm semiconductor FAB.--Be familiar with logic and 3D NAND process flow;--Highly skilled at trouble shooting AMAT LK and LKP, and CMP Pad/disk/slurry cost down relatedissue, skilled at defect reduction and process stability improvement.--With strong team work spirit, good at co-work with modules and integration to solve CMP processrelated inline/yield issue.
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Cmp Process Engineer英特尔 Dec 2017 - Present中国 辽宁省 大连1. F68A New FAB start up, responsible for test wafer /production recipe and mesurement tool recipe setup, qualify 3D NAND new products on AMAT LKP tools.2.New slurry and new type Heads conversion for poly selectivity improvement and Head cost reduction cost saving ~$2.5 per wafer.3.Co-work with TD CMP/TD PIE /Metro/RDA to optimize recipe and endpoint algorithm, setup effective inline AFM/defect detection, get yield gain ~2%.4. Finishing new pads qualification project, and extend padlife 60%.5.By optimizing the cleaner recipe, the inline production and offline test wafer center/edge special map fail ratio down to 5% from 70%.6. As process owner co-work with TD complete the 3th/4th/5th 3D NAND transfer from TD to HVM, Meanwhile responsible for the new product manufacturing and yield improvement. -
Cmp Process Engineer中芯国际 Jul 2016 - Dec 2017北京 大兴区1. Qualify 55/65nm product on AMAT LK tool.2. Qualify second source slurry and get good performance of Dishing/erosionand cost down.
Frequently Asked Questions about Y Y
What company does Y Y work for?
Y Y works for 英特尔
What is Y Y's role at the current company?
Y Y's current role is CMP Process Engineer at Intel..
What schools did Y Y attend?
Y Y attended 大连理工大学.
Who are Y Y's colleagues?
Y Y's colleagues are Victor Cortez, Michael Milgie, Phd, Vinothkumar S, Shu Zhou, Shweta Kulkarni, Prakash Bhagavan, Jeetu Goel.
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