Yield Senior Engineer (Yield Defect Density)
Current1. Supervise YDD Associate Engineers and wafer tech operators to ensure smooth 24/7 inline shift operation2. Train and certify D0 Associate Engineers on recipe creation and defect source knowledge3. Maintain and enhance internal SOP/CAS and involve in internal/external audit4. Operate FIB/SEM/EDX for inline failure analysis5. Perform partition analysis on defect source and detailed reports on issues6. Build and develop defect source library and tool’s defect source fingerprinting7. Track inline defect performance by layer /process tool/chamber on weekly basis8. Perform killer ration analysis9. Perform defect characterization by process tools10. Continuous improvement activities on defect reductions with Modules /vendors / equipment team11. Liaise with process engineers in different modules to troubleshoot for inline defects and defect reduction activities12. Provide scan support in low yield investigation & co-work with PI/YE/PE on technology & device specific yield enhancement activities13. Automate daily activities to improve troubleshooting speed of team14. Responsible for wafer quality to conform to product requirements and have the authority to stop shipment and stop production to correct quality problems