M.S. Candidate in the School of Electrical Engineering and Computer Science at the Oregon State University, Corvallis, USA.Specialties: My research include Familiar with WLAN and TCP/IP protocolFamiliar with PythonExperience and strong fundamentals in FPGA based design: designed, analyzed, simulated and built FPGA based systems Excellent Verilog coding and Matlab simulationStrong knowledge in digital design and RTL synthesis, test bench design, simulationFluent lab test experience Experience interfacing FPGAs to DDS clocking modules and AD/DA converters
Listed skills include Verilog, Matlab, Fpga, Python, and 7 others.