Develop Oracle's next generation server

Responsible for the qualification of PCIe, DDR3, clock signal, and relative part qualification of EMC next generation product. Also have much experience in board power test and stress test. Familiar with high speed scpoes and other vendor test tools. Co-ordinate with US team for global design project as HW qualification engineer.•Proficient in Saber, Cadence, Intel Asset. •Familiar with IA platform signal integrity test, including PCI-E 2.0/3.0, DDR3 compliance test, and multiple protocol(SAS 2.0, 10G BASE-T, 1G BASE-T) validation test. •Familiar with Agilent(DSO91304A) & Tek(DSA71254B) high speed scope (for SI test); Tek 4104B (for board power test), and other various testing tools. •Familiar with onboard power (POL) test. •Familiar with test script writing (VBS, Python).