・20 years experiences in SRAM/TCAM circuit and layout design as engineer.・Circuit design skill of SRAM/TCAM, especially good at: low-leakage SRAM, multi-port SRAM such as 2P/DP, pseudo-SRAM and various assist circuitries to enhance performances of SRAM.・Layout skill of SRAM/TCAM, especially good at: area-efficient SRAM for advanced node such as 28nm, 16nm and 7nm.・Experience designing SRAM bit cell from 180nm to 2nm. ・Experience leading SRAM IP development team consists of 4 or 5 members.・Abundant knowledge of patents for SRAM/TCAM based on activity of patent representative over 10 years.・25 patents achievement in relation to SRAM circuit and layout technique.・Academic achievements: 2 first-author papers and 4 presentations at International conferences. https://www.researchgate.net/profile/Yuichiro-Ishii180nmにはじまり、現在主流の45/40nm, 28nmそして最先端の16/14nm 7nm FinFETプロセスでのSRAM IPの回路・レイアウト設計の経験があります。現在は最先端ノード(2nm/3nm)でのSRAM/TCAM IP開発に従事しております。