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Yuliang (Michael) Du Email & Phone Number
Sr. FPGA Engineer
at
Ripple Technology Inc.
1 work email found
@abbott.com
LinkedIn matched
✓ Verified Jul 2026
4 data sources
Profile completeness 100%
Current company
Role
Sr. FPGA Engineer
Location
Santa Clara, California, United States
Company size
Who is Yuliang (Michael) Du? Overview
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Quick answer
Yuliang (Michael) Du is listed as Sr. FPGA Engineer at Ripple Technology Inc., a with 14 employees, based in Santa Clara, California, United States. AeroLeads shows a work email signal at abbott.com and a matched LinkedIn profile for Yuliang (Michael) Du.
Yuliang (Michael) Du previously worked as Engineering Manager at General Aerodynamics Corporation and Chief Technology Officer/Owner at Insync Biomed Llc. Yuliang (Michael) Du holds Doctor Of Law - Jd, Intellectual Property Law from Unh Franklin Pierce School Of Law.
Company email context
Email format at Ripple Technology Inc.
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ydu@abbott.com
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AeroLeads found 1 current-domain work email signal for Yuliang (Michael) Du. Compare company email patterns before reaching out.
Profile bio
About Yuliang (Michael) Du
Sr. hardware design engineer with over 10 years of dynamic career in analog/digital design with commercial μChip/DSP components, FPGAs, proprietary ASICs, with a focus on medical devices including cochlear implant, speech processors, pacemakers and ICDs in the fast-paced class III medical industry.Functional responsibilities and competencies include:• Prototype and feasibility study for prototypes based on existing proprietary ASIC and commercial ICs.• Schematic capture through Cadence OrCAD capture, Altium design or Mentor Graphics PADS• DSP algorithm implementation and programming to TI DSP processors• Coding Atmel/Microchip embedded processors• Programming skills in VC++, C18, MATLAB and Labview• Strong background in CMOS transistor-level circuit simulation through Mentor Graphics Eldo or Cadence PSpice simulators.• Experience in designing analog/digital electronics, MCU interface, RF transceiver, power electronics• Lead the post silicon electrical characterization/failure analysis/ESD failures for ASIC blocks• Knowledge of RF impedance matching techniques and electromagnetic simulation tools.• Statistical/Cpk /trending analysis of large SQL datasets of production data with Minitab/Matlab• Generate product design specs, design requirement, verification and validation report• Initiate ECO changes through engineering/failure analysis report in product lifecycle management.• Hardware debugging skills using oscilloscope, signal generator, logic analyzer, etc.• Building ATE test equipment and design functional test coverage for cochlear implant hybrid/device test coverage• Clean room fab in 2um silicon fabrication and device characterization • Failure analysis using XIVA, FIB and SEM at die level• TLP test (HBM model) on ESD protection circuitry of the ASIC• Implement/Manage the ATE testers for medical clean room production line• Cpk control/improvement and process optimization on the implant production at wafer/hybrid level
Listed skills include Matlab, Semiconductors, Circuit Design, Labview, and 50 others.
Current workplace
Yuliang (Michael) Du's current company
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Ripple Technology Inc.
16 roles
Yuliang (Michael) Du work experience
A career timeline built from the work history available for this profile.
Engineering Manager
Current
Mar 2021 - Present
Chief Technology Officer/Owner
Current• Led animal study for a class III medical device at Insync Biomed LLC• Spearheaded patent application for innovative cardiac contractility device• Developed cutting-edge device with pacemaker functionality for cardiac health
Sep 2022 - Present
Chief Executive Officer, Chairman
CurrentManages the TRL7 robotic arm development, ME design, software development, iOS app, fund raising, non-provisional patent filing at USPTO
Feb 2021 - Present
Chief Technology Officer, Secretary
Develop the TRL3 robotic arm architecture, provisional patent filing
Jan 2021 - Jan 2021
Sr. Fpga Design Engineer
• Developed RTL for Aurora IP 100Gbit data acceleration on Xilinx U50 platform for server applications.• Implemented PCIe 3x16 lane Pair to Pair communication with NVMe to U50.• Utilized C programming for clocking and communication through QSFP link on ZCU216 platform.
Nov 2022 - Oct 2023
Sr. Fpga Design Engineer
• Validated RTL through FPGA emulation platform for datacenter IC on VU13P and VU19P Xilinx platforms.• Implemented and debugged PCIe IP module using PCIe protocol analyzer.• Utilized Synopsys Protosynthesis workflow for full RTL gate netlist image build.
Nov 2021 - Feb 2023
Staff Engineer
Electronic design of various service robots including power electronics, hand motion controller, RPi camera based detection, HRI user interface, ambient light detection, NFC verification, ROS communications of sensor messages etc
Jun 2020 - Dec 2020
Sr. Research Engineer
Autonomous Drones, Xilinx FPGA code development, Matlab/simulink DSP model verification
Apr 2019 - Jun 2020
Sr. Fpga Engineer
Schematic design of the SATCOM antenna controller, variable gain interface and RSSI boards VHDL coding of low level drivers for IMU/gyro/optical encoder/digital attenuator/ADC using Altera FPGA
Mar 2017 - Apr 2019
Jan 2017 - Mar 2017
Sr. Hardware Design Engineer
ConfirmRx AFE design, full system design and integration testing, Multichannel simultaneous RF injection system design, EMI tester redesign, multi-slice SMS RF sweeping impact on the CRT-P/D devices. SBP redesign for conditional MRI compliance. Etc.
Aug 2014 - Jan 2017
Electrical/Sr. Ate Engineer
XIVA/TLP/FIB analysis on the p-DAC electrode circuitryDual DSP speech processor board redesign Onsemi Fab-10 ion implantation process induced chip failure analysisReduced RSSI and backtel drifting due to TDK ferrite thermal annealingEtc
Sep 2009 - Aug 2014
Sep 2008 - Aug 2009
Graduate Research Assistant
Usc - Ultralow Temperature Physics Lab
Superfluid He-3 in aerogel A-like phase order parameter detection
Aug 2003 - May 2009
Research Assistant
Optical response of ZnO nanowireOptical fiber coupling to photonic crystal superprism
May 2001 - Sep 2003
6 education records
Yuliang (Michael) Du education
Doctor Of Law - Jd, Intellectual Property Law
Unh Franklin Pierce School Of Law
Doctor Of Philosophy (Ph.D.), Condensed Matter And Materials Physics
University Of Southern California
Ms, Electrical Engineering
University Of Southern California
Master'S Degree, Physics
University Of Southern California
Bs, Physics
Tsinghua University
Education record
Beijing No. 8 Middle School
FAQ
Frequently asked questions about Yuliang (Michael) Du
Quick answers generated from the profile data available on this page.
What company does Yuliang (Michael) Du work for?
Yuliang (Michael) Du works for Ripple Technology Inc..
What is Yuliang (Michael) Du's role at Ripple Technology Inc.?
Yuliang (Michael) Du is listed as Sr. FPGA Engineer at Ripple Technology Inc..
What is Yuliang (Michael) Du's email address?
AeroLeads has found 1 work email signal at @abbott.com for Yuliang (Michael) Du at Ripple Technology Inc..
Where is Yuliang (Michael) Du based?
Yuliang (Michael) Du is based in Santa Clara, California, United States while working with Ripple Technology Inc..
What companies has Yuliang (Michael) Du worked for?
Yuliang (Michael) Du has worked for Ripple Technology Inc., General Aerodynamics Corporation, Insync Biomed Llc, Advanced Robotics Corp., and Lockheed Martin.
How can I contact Yuliang (Michael) Du?
You can use AeroLeads to view verified contact signals for Yuliang (Michael) Du at Ripple Technology Inc., including work email, phone, and LinkedIn data when available.
What schools did Yuliang (Michael) Du attend?
Yuliang (Michael) Du holds Doctor Of Law - Jd, Intellectual Property Law from Unh Franklin Pierce School Of Law.
What skills is Yuliang (Michael) Du known for?
Yuliang (Michael) Du is listed with skills including Matlab, Semiconductors, Circuit Design, Labview, Characterization, Signal Processing, C, and Silicon.
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