Ze'Ev Gal Email & Phone Number

Central, Israel

Design verification environments for modules designed in our team. The modules are part of a FPGA that our team design, and is part of most advanced Ribbons(former ECI) portfolio.

Israel

- Designed a deep learning model based on CTGAN- Add algorithm to CTGAN results to generate drug molecules- Implemented feature selection, feature engineering, and an algorithm which implemented mathematical rules on the GAN results.

Israel

 Developed software for testing hardware modules in simulation., using OOP methodology. Implemented hardware algorithms and protocols in code, to activate HW modules. Wrote PERL and PYTHON scripts for automated debugging. Designed test plan, defining tests sequences and coverage matrix. Created verification environment and sequences.

 Performed functional verification of IP modules such as Flash Controller and USB. Wrote test plan and executed its implementation using C, ASSEMBLY or Verilog.

 Responsible for implementing Asic security engines such as SHA and DES using VHDL Documenting, Debugging RTL and run synthesis on those modules

Israel

 Responsible for defining and implementing a router in PoweQuicc with Verilog Developing scripts for automated validation Post silicon testing Write tests for several DSP's modules Running functional simulations and debugging failures

 Testing medical devices both in field and lab Commander in medical devices workshop Technical lead in the workshop staff on fixing and enhancing medical devices

Education record

Supervised Learning, Unsupervised Learning,Deep learning basics, CNN, RNN, GAN etc. and Image Processing

Bachelor Of Applied Science - Basc, Electrical, Electronics And Communications Engineering

Activities and Societies: Award of Student Excellence - Beit Midrash Program