Analog Computing
Design FPGA for AES algo(C). such as SHA3, SHA-256, groestl, keccak and other special algo for crypto.Design analog block to finish full adder or other XOR, NAND, NOR and MUX (stdcell).
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李世杰 is listed as Engineer at AIRJET AVIATION Inc based in Shanghai, China. AeroLeads shows a matched LinkedIn profile for 李世杰.
李世杰 previously worked as Analog computing at Self-Employed and RF&analog circuit design at Unisoc. 李世杰 holds Master, Microelectronic from 西安交通大学.
李世杰 is a Engineer at AIRJET AVIATION Inc.
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Design FPGA for AES algo(C). such as SHA3, SHA-256, groestl, keccak and other special algo for crypto.Design analog block to finish full adder or other XOR, NAND, NOR and MUX (stdcell).
Shanghai, China
RF&analog circuit design for PA ( RF power amplifier), some subthreshold circuit design, Self-heating debug, RF&analog spur tracking.
Xi'An
high-speed serdes design. CDR, EQ, CTLE, 8b/10b encoding, 4b/5b, ethernet PHY, 802.3 protocol, jitter tracking & jitter tolerance Analysis.
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李世杰 is listed as Engineer at AIRJET AVIATION Inc.
李世杰 is based in Shanghai, China.
李世杰 has worked for Self-Employed, Unisoc, and Airjet Aviation Inc.
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李世杰 holds Master, Microelectronic from 西安交通大学.
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