徐亚鹏

徐亚鹏 Email and Phone Number

高级FPGA工程师
徐亚鹏's Location
Shenzhen, Guangdong, China, China
About 徐亚鹏

Independently develop FPGA-based devices from concept to bring-up and thoroughly complete FPGA design flow. Proficiency with FPGA coding, debugging, and problem-solving.Excellent expertise in multiple Interfaces and Protocols including SerDes, 10GE, DDR, and AXI.Proficiency in EDA tools: Vivado, Synplify, VCS, Verdi, Modelsim, nLint.Proven programming skills (Verilog/SV) and scripting skills (bash/Tcl/Python). Familiar with ICT Infrastructure (server, Storage, Switch), networking protocols (TCP/IP, RDMA).Great experience of leading a team to deliver FPGA products in high quality.

徐亚鹏's Current Company Details

高级FPGA工程师
徐亚鹏 Work Experience Details
  • 华为
    高级工程师 Fpga
    华为 Nov 2007 - Apr 2017
    中国 广东 深圳
    FPGA开发、FPGA项目管理、FPGA验证
  • 比亚迪
    汽车电子工程师
    比亚迪 Jul 2004 - Nov 2007
    中国 广东 深圳

徐亚鹏 Education Details

Frequently Asked Questions about 徐亚鹏

What is 徐亚鹏's role at the current company?

徐亚鹏's current role is 高级FPGA工程师.

What schools did 徐亚鹏 attend?

徐亚鹏 attended 西安电子科技大学.

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