조병구

조병구 Email and Phone Number

rtl logic design and fail analyze @ SK 하이닉스
san jose, california, united states
조병구's Location
Seoul Incheon Metropolitan Area, Korea, Republic of
About 조병구

* Career1) 2017. 7. - PresentNAND design eng. - Logic rtl- 128 stack PRJ experience- Design fail analyze with customer2) 2015. 2. - 2017 6.Digital h/w eng.HW and Firmware deaign* Available tools & abilitiesschematic - virtuosortl -VHDL Verilogsimulation - xcelium, post simulationverification(sw tool) - verdi(eco), formalitylayout - laker, encounterverification(hw tool) - magnum

조병구's Current Company Details
SK 하이닉스

Sk 하이닉스

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rtl logic design and fail analyze
san jose, california, united states
Website:
skhynix.com
Employees:
4660
조병구 Work Experience Details
  • Sk 하이닉스
    Semiconductor Engineer
    Sk 하이닉스 Jul 2017 - Present
    대한민국 경기도 이천
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  • Qucell Networks
    Hardware Engineer
    Qucell Networks Mar 2015 - Jun 2017
    대한민국 경기도 분당동
    femtocell Digital H/W and firmware design
    View

조병구 Education Details

Frequently Asked Questions about 조병구

What company does 조병구 work for?

조병구 works for Sk 하이닉스

What is 조병구's role at the current company?

조병구's current role is rtl logic design and fail analyze.

What schools did 조병구 attend?

조병구 attended Kyung Hee University 경희대학교.

Who are 조병구's colleagues?

조병구's colleagues are Yewon Jung, Sung Bo Hwang, 유재선, Jeff Ryu, 이덕래, 박병혁, Wansoo Kim.

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