Signal and Power Integrity Measurement, Analysis, and Verification for HPC, Memory Interface & SERDES I/O• Measurement Item - Channel : S-parameters, Transmission Line Parameter Modeling and Characterization, Dielectric Material Characterization - Power Integrity : Offchip PDN, System PDN, Power Noise, Current Scenario(CPM), LVcc, Discrete Capacitors (ISC) - Signal Integrity : Eye Diagram, Jitter Analysis, De-embedding - Power and Signal Integrity : Jitter Sensitivity Function(JSF), PSIJ• High Speed Interface Simulation - Efficient Eye Diagram Simulation (Peak Distortion Analysis) - In-House Tool Development (Python)• Familiar CAD tools & Software 1) Circuit Simulation : Primesim, Hspice, ADS, Matlab 2) Field Solver : Ansys Tools(HFSS, HFSS 3D Layout, SIwave, Q2D), Cadence Tools(PowerSI, BBS) 3) Layout & Artwork : Virtuoso Layout, Allegro, P-CAD2001 4) Program Language : Python• Main Contribution - Correlation Methodology with Measurement - Measurement for Signal and Power Integrity Verification - Automated Measurement Environment - Transmission Line Modeling & Characterization