Nano-PACK Lab (Nanopackaging & Thermal Transport Lab)

Our group led by Prof. Tiwei Wei, is focusing on two critical challenges in 3D integration technology: (1) Materials, Processing, and Architecture Development for Semiconductor Packaging, where I will share our latest research on the thermal, mechanical stress, and microstructure evolution behaviors in scaling 3D interconnects, as well as novel materials for vertical 3D interconnects; and (2) Heat Transfer in Semiconductor Devices and Advanced Packaging, which involves investigating nanoscale thermal transport phenomena at various levels, from the device level to the BEOL (Back-End-Of-Line), and extending to the chip and packaging levels. In addition, the direct-on-chip two-phase microfluidic cooling, near-junction cooling techniques, and the development of efficient thermal packaging materials designed for extreme thermal isolation and effective heat spreading.