Adolph Seema, Phd.
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Adolph Seema, Phd. Email & Phone Number

SoC and Chip Design Lead at Microchip Technology Inc.
Location: Phoenix, Arizona, United States 14 work roles 3 schools
1 work email found @microchip.com LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 100%

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Current company
Role
SoC and Chip Design Lead
Location
Phoenix, Arizona, United States
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Adolph Seema, Phd. is listed as SoC and Chip Design Lead at Microchip Technology Inc., a with 17178 employees, based in Phoenix, Arizona, United States. AeroLeads shows a work email signal at microchip.com and a matched LinkedIn profile for Adolph Seema, Phd..

Adolph Seema, Phd. previously worked as SoC/Chip Design Lead at Microchip Technology Inc. and Member Of The Board Of Directors at Movement Interactive. Adolph Seema, Phd. holds Bachelor Of Science - Bs, Computer Engineering from Rochester Institute Of Technology.

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About Adolph Seema, Phd.

Sample Publications:U.S. patent number 10,631,793, Impact indicator,https://uspto.report/patent/grant/10631793, https://patents.google.com/patent/US10631793US Patent 9715585: Optical authentication of operations for a mobile device, https://www.google.com/patents/US9715585US Patent 9838760: Systems and methods for name-based segmented media acquisition and distribution framework on a network, https://www.google.com/patents/US9838760Seema, A. as part of the Trusted Computing Group. Represent Microchip Technology, Inc. in Standardsand Guidance research and publications. Latest: "TCG Guidance for Secure Update of Software and Firmware on Embedded Systems", https://trustedcomputinggroup.org/resource/tcg-guidance-for-secure-update-of-software-and-firmware-on-embedded-systems/Seema, A., Shah, T., Schwoebel, L. et al. "Power profiling of multimedia sensor node with name-based segment streaming", Multimedia Tools and Applications (2018). https://doi.org/10.1007/s11042-017-5565-1, Springer US, Print ISSN 1380-7501, Online ISSN 1573-7721.Seema, A.; Schwoebel, L.; Shah, T.; Morgan, J.; Reisslein, M. “WVSNP-DASH: Name-Based Segmented Video Streaming”, IEEE Transactions on Broadcasting, Year: 2015, Volume: 61, Issue: 3 Pages: 346 - 355, DOI: 10.1109/TBC.2015.2400816Adolph Seema and Martin Reisslein. "Towards Efficient Wireless Video Sensor Networks: A Survey of Existing Node Architectures and Proposal for A Flexi-WVSNP Design" , IEEE Communications Surveys and Tutorials, Volume 13, Number 3, Third Quarter 2011. http://dx.doi.org/10.1109/SURV.2011.102910.00098, 03 December 2010.Adolph Seema, "Blueprint for a Low-Cost Piggyback Wireless Video Sensor Node/Platform Architecture," master thesis, School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, 2009. Committee:Dr. Martin Reisslein (chair), Dr. Karamvir Chatha, Dr. Donald Miller.Robert L. Kremens, Andrew J. Gallagher, Adolph Seema, "Low Cost Autonomous Field-Deployable Environment Sensors", Published in the Proceedings of the American Institute of Physics Unattended Radiation Sensor Systems for Remote Applications, (Volume 632), Washington DC, September 2002. http://www.cis.rit.edu/~rlkpci/PDFs/urssra_Kremens.pdf

Listed skills include Software Development, Integration, Embedded Systems, Wireless, and 11 others.

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Adolph Seema, Phd.'s current company

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Microchip Technology Inc.
Microchip Technology Inc.
SoC and Chip Design Lead
Phoenix, AZ, US
Website
Employees
17178
AeroLeads page
14 roles · 26 years

Adolph Seema, Phd. work experience

A career timeline built from the work history available for this profile.

Soc/Chip Design Lead

Chandler, Az, Us

Still enjoying an amazing company with unbelievably humble and reputable leadership. More chips to send to fab and customers. More design challenges to overcome. New technology nodes to introduce. More great teams to assemble and execute with. Looking forward to a great many years building secure, functionally safe, automotive and high connectivity ARM SoC Designs.

Founding Cto

Phoenix, Us

Help found a concussion monitoring and prevention device making company, hijiband.com . The Bluetooth LE + IoT primary sensor device and mobile app, HIJI BAND, was targeted at high activity and high impact sports. Built and led the original engineering team and built the first three prototypes. Established the supply chain, component selection and PCB design process, manufacturing and testing plans. Took the sensor through an Institutional Review Board (IRB) study, field testing and got the product ready for mass production. Participated in investor pitch sessions and helped take the product through a Kickstarter campaign. Recruited, trained and supervised engineers on all aspects of engineering.

May 2014 - May 2018

Wvsnp Project Lead @ Multimedia Networking Lab

Arizona State University

My proudest achievement in this lab has been in helping and mentoring more than sixty five (65 and counting ...) masters and capstone undergraduate engineers design, frame and defend their theses, graduate projects and capstone senior design projects as well as help young researchers through the Fulton Undergraduate Research Initiative (FURI) in proposing grants, executing and implementing the engineering ideas and delivering meaningful prototypes and functional demos. Watching all graduate and excel in industry is the biggest payback I can ask for.

Senior Cryptography & Security Ip Design Engineer

Eindhoven, Noord-Brabant, Nl

Had a wonderful eight years modelling, verifying, developing and helping deliver Cryptographic Accelerators and security IP that delivers everything a secure product can ever need :) An alphabet of HW algorithms and features (e.g. AES, DES, PKI, TRNG). Other protocols and algorithm functions provided by the IP are TLS, IPsec, SNOW 3G F8/F9, ZUC LTE A/E Integrity/Confidentiality, DRNG, ECDSA, RSA, SHA, Message Digest, CRC, SM4, ECC, PUF, Tamper Resistant Secure Non-Volatile Storage, Secure RTC, Real Time Integrity Checker (RTIC), Secure Memory, TrustZone, Virtualization, High Assurance Boot (HAB), Root of Trust, Secure Scan, etc. with or without DPA and SCA attack hardening options based on application targets and configuration, HSM, and HSE, etc. Developed CAVP and CMVP tests and tools to get FIPS 140-2 certifications for our IP. SoC integration and FPGA compliant RTL delivery and post silicon validation support. A variety of the IP deployed in most of NXP SoCs.

Dec 2015 - Aug 2019

Hw/Sw Security Design Engineer, Networking And Multimedia Group

Austin, Texas, Us

Cryptography Accelerators for Freescale's QorIQ, and i.MX family of SoCs. Security IP modeling, implementation and verification on Power and ARM architecture SoCs for multimedia, wireless, automotive and industrial control applications.

May 2011 - Dec 2015

Programmer, American Express Technologies

New York, Ny, Us

Financial Platform Engineering, Highly Distributed Service Oriented Architectures, Secure Applications Development and Integration.

2010 - May 2011

Software Engineer, Asm America, Inc.

Asm

Almere, Flevoland, Nl

Heterogeneous cluster based software development and system integration for 45, 32, 22 nm and beyond Semiconductor Fabrication and Automation. Robot, actuator and networked sensor controls for Plasma Enhanced, Atomic Layer Vapor Deposition processes.

Oct 2004 - Nov 2010

Embedded Design Engineer

PCB design and firmware development for multiple wireless protocols and sensor networks.

2004 - 2004

Chip Design Engineer

Cupertino, California, Us

VLSI design, pre (HDL) & post (Signal Analysis) silicon chip verification (co-op).

2002 - 2003 ~1 yr

Associate Digital Design\Embedded Systems Engineer

Spectracom

PCB driver development for satellite synchronized networked time server systems (co-op).

2002 - 2002

Technology Venture Clinic

Scottsdale, Arizona, Us

Wireless Technologies portfolio research, due diligence and commercial viability evaluation (Internship).

2002 - 2002

Hardware/Software Design Engineer

Rit Center For Imaging Science (Nasa Project)

Embedded system design for GPS based fire sensor network prototypes.Publication: http://academic.research.microsoft.com/Paper/2348187.aspx(co-op).

2001 - 2001
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3 education records

Adolph Seema, Phd. education

Bachelor Of Science - Bs, Computer Engineering

Rochester Institute Of Technology

Doctor Of Philosophy - Phd, Ee (Signal Processing & Communication) - Wireless Video Sensor Platforms For Iot.

Arizona State University

International Baccalaureate - Ib

The Armand Hammer United World College
FAQ

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What company does Adolph Seema, Phd. work for?

Adolph Seema, Phd. works for Microchip Technology Inc..

What is Adolph Seema, Phd.'s role at Microchip Technology Inc.?

Adolph Seema, Phd. is listed as SoC and Chip Design Lead at Microchip Technology Inc..

What is Adolph Seema, Phd.'s email address?

AeroLeads has found 1 work email signal at @microchip.com for Adolph Seema, Phd. at Microchip Technology Inc..

Where is Adolph Seema, Phd. based?

Adolph Seema, Phd. is based in Phoenix, Arizona, United States while working with Microchip Technology Inc..

What companies has Adolph Seema, Phd. worked for?

Adolph Seema, Phd. has worked for Microchip Technology Inc., Movement Interactive, Arizona State University, Nxp Semiconductors, and Freescale Semiconductor.

Who are Adolph Seema, Phd.'s colleagues at Microchip Technology Inc.?

Adolph Seema, Phd.'s colleagues at Microchip Technology Inc. include [ Mrsuradechth ], Sailaja Akkem, Clifford Swartz, Bryan Gray, and Vignesh N.

How can I contact Adolph Seema, Phd.?

You can use AeroLeads to view verified contact signals for Adolph Seema, Phd. at Microchip Technology Inc., including work email, phone, and LinkedIn data when available.

What schools did Adolph Seema, Phd. attend?

Adolph Seema, Phd. holds Bachelor Of Science - Bs, Computer Engineering from Rochester Institute Of Technology.

What skills is Adolph Seema, Phd. known for?

Adolph Seema, Phd. is listed with skills including Software Development, Integration, Embedded Systems, Wireless, Device Drivers, Firmware, Computer Security, and Soc.

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