Akhil Babu Email & Phone Number

Redmond, Washington, US

Redmond, Washington, US

West Lafayette, IN, US

• ECE 477 - Digital Systems Senior Design Project
• Conduct laboratory sessions for 20+ students working in teams on open-ended integrated hardware and software projects.
• Mentor and guide students to design for quality, include realistic constraints and to consider alternative solutions.

Redmond, Washington, US

• Developed an automated UVM based testbench generation tool in python for a highly configurable utility fabric.
• The tool instantiates the verification components based on the design configuration and integrates a memory management kit.
• Ability to add/configure new master and slave agents at any time.

Suwon-Si, Gyeonggi-Do, KR

• Worked in the RTL Design team for modelling Neural Processor Architecture, an on-device hardware accelerator for Deep-Learning, in the Samsung Advanced Institute of Technology (SAIT) Division at Samsung Research.
• Implemented the MAC unit in RTL and made micro-architectural optimizations based on PPA analysis.
• Developed a python based lightweight simulator tool that estimates the area and power of any given design prior to RTL implementation.
• Optimized the Data fetching unit with a 16 % improvement on Power and 4 % improvement in the area.
• Developed an automated flow to synthesize using Design Compiler and calculate the power using PrimeTime and Spyglass for a given design

Tiruchirappalli, Tamil Nadu, IN

• The undergraduate thesis was to increase the efficiency of cross-coupled differential drive CMOSrectifiers used in RF to DC conversion.
• Explored the effect of having multiple stages and change in width of MOS transistors on the efficiency of a CMOS recti fier and proposed a novel dynamic threshold voltage cancellation technique.

Suwon-Si, Gyeonggi-Do, KR

• Worked on 'Adaptive Load Tracking on Heterogeneous Architectures' in the Application Processors team at Samsung Research Institute, Bangalore.
• Developed and implemented 'Exponential Forecast Algorithm' on the scheduler of big.LITTLE - aheterogeneous computing architecture.
• Incorporated per task load prediction in the algorithm to rightly classify the load into the small/big core.
• Reduced the computation complexity and storage space requirement associated with load tracking on the Scheduler.

Bhopal, Madhya Pradesh, IN

• Worked in the Electrical and Instrumentation laboratory to build a 'PSoC' based receiver module to remotely monitor the sodium levels in the reactor and display them on a GUI.
• The circuit was capable to acquire, isolate, amplify and digitize the low-level analog signals using PSoC 5.

Master'S Degree, Electrical And Computer Engineering

Bachelor Of Technology - Btech, Electrical, Electronics And Communications Engineering

Education record