Alka Garg Email & Phone Number

Singapore

Singapore

Singapore

• GNSS IP Project: GNSS IP to be used for 5G modem subsystem for mobile application. Project is completed in various technologies, Intel C14, TSMC C16, TSMC C28HPC+Principal Responsibility:
• Technical Lead for the GNSS project in C28HPC+ tech. I was responsible for complete flow from synthesis to tapeout. Apart from managing schedule and looking after KPI to meet for power reduction. My responsibilities.
• IRdrop analysis for GNSS IP in C16/C14/C28 technology. Connectivity Projects: WIFI Bluetooth Combo subsystem designed for Intel PC group in C28 technology.Principal Responsibilities:
• Power and Irdrop Analysis:  Did various analysis like static, rampup, dynamic to check robustness of power grid.  Performed power analysis using vectors, detailed analysis of results to see if power can be improved.o.

Singapore

• Project: Development of a connectivity chip with ultra-low power consumption, comprising of NFC, GPS/GLONASS, BT, and FM controller targeting smart phones and tablets market. Device is targeted in 40nm.
• Risk management–Identified risks, uncertainties and potential problems which could affect project execution. Handled risk assessment and took appropriate action to solve them.
• Worked with cross functional team and created and executed detailed SoC level bottom-up schedule to follow STEPP (ST-Ericsson Product Process).
• Ensured that deliverables are on time.Worked with IP organization and SOC team leads and acted proactively to avoid any delay on the schedule.
• Worked with IP organization and ensured IP quality is good to achieve first pass success.
• Managed SoC CCB(change control board).

Singapore

• Design Verification Lead (June’09-Aug’11)Achievement:
• Built a new team for design verification activities of Bluetooth subsystem for two products. Transferred design verification activities from France to Singapore and executed DV tasks with quality and on-time. Also.
• Managed resources and team performance appraisals for very complex products which are running in parallel and to be completed with-in very short span of time.Project: Bluetooth IP subsystem Verification Lead Achievement:
• Grew a team to 13 members and brought to full potential and productive within short span of time.
• Achieved IP delivery on time to meet project schedule and customer requirement.
• Demonstrated strong leadership by managing cross geographical functional teams.

Singapore

• Project: Design and implementation of USB 3.0 slave controller which includes a new, higher speed bus called SuperSpeed, which supports speed upto 5Ghz.Achievement: Successfully verified Protocol layer for USB3IP.
• Developed BFM, Monitor, Scoreboard, and test environment in e-language for Protocol layer verification.
• Achieved 100% functional coverage for priority1 and priority 2 features for protocol layer.
• Created automated sequence lib with capability of all random out transaction with all types of error injection.
• Co-ordinate with different module RTL designer for IP integration testing. Successfully made one OUT transaction pass with all USB3 layers integrated.

Singapore

• Senior IC Design Engineer (July'03 – Dec’07) Project: Design and implementation of Wireless USB device which enables USB peripherals to communicate with Host without using USB cables. This project is done in.
• Created design verification environment and wrote tests using SPECMAN and E-language to verify WiFi MBOA MAC beacon processing. Performed equivalence checking on completed MBOA MAC controller. Also integrated and.
• Being an IC lead for the Project, worked with the team members to solve different issues for backend, analog, FPGA and Silicon testing
• Providing customers encrypted model and responding to them on there queries and helping them to solve issue with integration and bugs.
• Actively involved in development of ULPI Specification 1.0
• Top level integration of design, verification and Synthesis of ULPI transceiver and ULPI Link wrapper.

Gurgaon, India

• Achievement: Design, synthesis and verification of Motorola’s SoC Designs (System on Chip) used for motor control and wireless communication. Project: DBMX1+ is part of Motorola’s Dragonball™ family and is ARM9 based.
• Verified USBOTG (Universal Serial Bus- On the Go) core at chip/system level and from application perspective.
• Set up the environment using C and verilog HDL for system level verification and gave training to the team for using the environment.Project: Worked on 5 DSP controllers which are part of Motorola HawkV1 and HawkV2 DSP.
• RTL design, synthesis and verification of TOD (Time of Day) module
• System/chip level verification of various chip modules like MPIO, SCI(Serial communication interface), SPI(Serial Peripheral Interface), GPIO(General Purpose Input Output), EXBIU(External bus interface), ITCN(Interrupt.
• Developed the flow for chip level formal verification of Monza using Verplex LEC and Synopsys Formality. Bench marked both tools for the project.