I am a passionate and results-driven Design and Verification Engineer with a strong background in Design, Verification methodologies, and digital design. I have extensive experience working with various EDA tools and am proficient in Universal Verification Methodology (UVM), enabling me to efficiently verify and validate complex designs.My expertise includes creating efficient design architectures, writing comprehensive test benches, and ensuring that all designs meet the highest standards of performance and reliability.My VLSI Domain skills include,② HDL: Verilog② HVL: System Verilog③ Verification Methodologies: Constraint Random Coverage Driven Verification② Assertion-Based Verification: SVA③ TB Methodology: UVM② Tool: Synopsys -VCS, Mentor Graphics QuestaSim, Xlinix③ Domain: ASIC front-end Design and Verification⑦ Operating System: Linux② Scripting Languages: PerlCurrently, I am seeking new opportunities where I can leverage my skills and experience to drive cutting-edge projects, contribute to a dynamic team, and kick-start my professional growth in the design and verification domain.Let's connect if you're looking for a dedicated engineer who can bring technical excellence and a proactive approach to your team! I have completed my Mtech in VLSI at IIT Mandi, one of the premier institutions in India for engineering and technology. I have a strong interest and background in VLSI, having completed my Btech in the EEI am pleased to inform you that I have completed my Mtech in VLSI from IIT Mandi, which is known as one of the top engineering and technology institutions in India. Before that, I completed my Btech in the EE domain from Maharishi Markandeshwar University in 2018.My main area of interest lies in VLSI, and I have gained considerable proficiency in using Cadence Virtuoso and Verilog for designing, simulating, and testing analog and digital circuits. domain from Maharishi Markandeshwar University in 2018. I have developed proficiency in using Cadence Virtuoso and Verilog to design, simulate, and test analog and digital circuits.
Maven Silicon Vlsi Training Center
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Advanced Vlsi Design And VerificationMaven Silicon Vlsi Training Center Apr 2024 - PresentCourse Instructor: Sivakumar P R, Maven Silicon VLSI Training Center - Bengaluru.
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Graduate Teaching Assistant, Embedded System, Iit-MandiIit Mandi Jan 2023 - May 2023Course Instructor: Dr. Shubhajit Roy Chowdhury, IIT Mandi
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Graduate Teaching Assistant, Digital Electronic , Iit-MandiIit Mandi Aug 2022 - Jan 2023Course Instructor: Dr Rahul shrestha , IIT Mandi
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Graduate Teaching Assistant, Digital Circuit Design Lab, Iit-MandiIit Mandi Feb 2022 - Jul 2022Course Instructor: Dr G Shrikant Reddy, IIT Mandi
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InternshipAbb India Ltd. Faridabad Feb 2018 - May 2018Measurement of stray load losses of the 3-phase induction motors. This training has certainly helped me in bridging the gap between theory and practical. It has empowered me to see how the knowledge gained through textbooks is implemented in practice.
Aman Nehra Education Details
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Bachelor Of Technology - Btech
Frequently Asked Questions about Aman Nehra
What company does Aman Nehra work for?
Aman Nehra works for Maven Silicon Vlsi Training Center
What is Aman Nehra's role at the current company?
Aman Nehra's current role is Advanced VLSI Design and Verification | Mtech in VLSI.
What schools did Aman Nehra attend?
Aman Nehra attended Indian Institute Of Technology, Mandi, Maharishi Markandeshwar (Deemed To Be University) Official.
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Aman Nehra
Student At Sam Higginbottom University Of Agriculture, Technology And Sciences (Shuats)Ahmedabad -
Aman Nehra
Banking Domain Expert | Core Banking | Retail Banking | Data Analyst | Credit Manager | Trade Finance| Lending | Insurance | Compliance | Process Optimization | Payments | Financial Analyst | Business Analyst|New Delhi -
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