I'm currently working for a customer which is the largest company, the leader in the production of microprocessors, chipsets, and other electronic devices.My role involves developing software simulation models in C/C++ of network adapters and chipsets that are in the early stages of hardware development. Additionally, I create test cases for implemented features using Python. Regular communication with the customer's technical team is an integral part of my responsibilities, ensuring clarity on requirements.

Developed software for the bank processing system. Analyzed requirements, enhanced the system, and fixed bugs.

Analyzed requirements and developed technical specifications for FPGA projects.Designed FPGA projects for a board with low-noise voltage sources and interfaces for a measuring system.Created debugging software in C and C++ for board testing.Projects:Network of Modems: The main goal of this project was to dynamically create and maintain a network of a group of subscribers (radio modems). The primary function was to merge and split groups in case of connection loss between them. Each subscriber had an microcontroller (MKL26Z) to manage the radio channel. For this project, I needed to implement synchronization and statistics exchange streams, as well as user information exchange. Additionally, I implemented a bootloader and remote bootloader over the radio channel. Golden firmware with cryptography was also required. Furthermore, for this device, I modified the FPGA firmware to extend the dynamic range of the optimal receiver. Low-Noise Voltage Meter: I served as the leader of the FPGA development team. My team consisted of 3 developers. My responsibilities included coordinating project requirements and implementing a portion of the project. The project involved implementing 2 modules within the measurement system. It was implemented on Altera CPLD (MAX10) and a separate interface project (CYCLONE V) with VXI and PCIe support. The project concluded successfully. We also coordinated the development of another module for the power supply source.

Responsibilities:- Design and development of the design of FPGA and hardware for MCU - Design and development of software programs for device management - Testing of developed devices - Support for devices developedProjects:4 channel Network Video Codec: The main function of the device is to compress video streams received from 4 cameras and transmit them over the network. The device is implemented on an FPGA (Spartan 6), and I developed the firmware for it. The device was implemented on a FPGA (Spartan 6). The project consisted of two parts: firmware for the FPGA and firmware for the processor (MicroBlaze) in the FPGA. The processor was responsible for managing streams, video coprocessor controllers, and peripherals. The device supported MAC, IP, ICMP, IGMP, UDP, and TCP protocols. I implemented the processor program using FreeRTOS with the lwIP library. In the FPGA firmware, I implemented 4 JPEG compress cores. In the project, I implemented support for “golden” firmware with bootloaders for both the FPGA and the controller code.

Responsibilities:- Design and development of FPGA design- Implementation of algorithmic solutions in FPGA - Verification of the developed models- Development of low-level drivers of functional devices implemented on the basis of FPGA - Development and debugging of complete software modulesProjects:Turbo Convolutional Code codec of LTE: I implemented error correction codec project for the FPGA (ZYNQ 7020). I hardware-implemented an encoder according to 3GPP LTE standards and a 6-iteration soft-decision decoder for each bit. Additionally, I developed a codec driver for the operating system. The throughput was 20 Mb/s. The implementation fully complied with the MATLAB model. Satellite System Receiver: I implemented digital signal processing on an FPGA (Spartan 6), particularly a quadrature receiver with CIC filtering. Additionally, I implemented Fast Fourier Transform for signal detection. The implementation fully matched the MATLAB model.

Control System of Radar: The main idea of this project was to enhance the fault tolerance of an outdated station control system. I designed a project for the FPGA responsible for interfacing the central computer (VME bus) with the local control bus.