Anthony Schepis Email & Phone Number

Albany, Ny, Us

Albany, New York, United States

Pioneering first of a kind hardware research/development coupled with novel integrated process flows to generate high value differentiated technology and intellectual property that will enable the next generation of semiconductor device design/fabrication. Leader of Tier 1 logic and memory foundry customer interaction for prototype tool placement/demonstration and technology incubation/evolution.It’s not about becoming complacent with the iterative advancement of what we are good at today, but pathfinding/recognizing what we need to be great at tomorrow to enable the semiconductor roadmap and continually advance the state of technology for the betterment of mankind.

Albany, New York Area

Contributor to TEL's continued success in assisting the evolution of becoming a truly global company, generating high added value and profits in the semiconductor industry through innovative technologies and groundbreaking proactive solutions that integrate diverse technology. I am devoted to the development of a dream-inspiring society directly through my work in creating advanced semiconductor equipment and processes to unlock the true potential of mankind. Specializing in integrated patterning research, I am responsible for providing novel hardware solutions to surmount technical challenges facing the semiconductor industry today and tackle advanced processes that meet the needs of tomorrow.

Rochester, New York Area

 Lead the effective operation of the photo area in a DoD Trusted Foundry through collaboration with service staff and lithography technicians; managing workflow in accordance with ISO 9001:2008 and ITAR protocols. Worked closely with customers in the design and development of microelectromechanical device patterning processes across a wide array of substrates and materials. Sustained existing manufacturing practices while seeking means to increase device yield and reduce process complexity. Established metrology inspection criteria with regard to design specification and system tolerance. Surmounted many unique integration issues related to patterning processes that resulted in yield enhancement across several projects. Responsibilities included supervision of lithography area, workflow planning, troubleshooting, process development, tool optimization, simulation, new material research and customer interaction.

Rochester, New York Area

 Explored optical lithography extension techniques through theoretical analysis,simulation and physical integration in a cleanroom fabrication environment. Areas of research included extreme ultraviolet, directed self-assembly and opticalvortex patterning.

Albany, New York Area

 Researched advanced lithographic solutions for next generation patterning at the 14nm node and beyond through the investigation of directed self-assembly integration in a 300mm manufacturing environment. Was responsible for mask design/layout on the Mentor Graphics Calibre platform for ArF excimer laser immersion scanners and physical integration/process development using test constructs; the results of which resulted in multiple journal publications. Qualified pilot process and established best known methods through process window analysis and metrology evaluation.

Rochester, New York Area

 Acted as a leader, role model, community builder, administrator and crises responder for community members. Facilitated the resolution of roommate and neighbor disagreements and proactively reached out to students to actively manage conflicts. Acted as an advocate for students who are dealing with a variety of issues and concerns including personal crises, academic underachievement and fiscal management. Executed regular educational programming for the RIT community, working cooperatively with colleagues.

Master Of Science - Ms, Microelectronic Engineering

Bachelor Of Science - Bs, Electrical Engineering