Ashish Pathak Email & Phone Number

San Jose, CA, US

Santa Clara, California, US

• Lead security and manageability strategy, solutions and roadmap for next generation Client APUs to drive innovation and contribute towards the growth of commercial market share
• Lead AI technology roadmap, ISV partnerships and OEM alignment to develop security solutions based on prediction, principles of zero trust, TEE (Trusted Execution Environment)
• Drive wireless manageability roadmap using WiFI, 5G modules. Lead cross-functional internal teams, module makers, security auditors and OEMs to introduce manageability solutions for enterprise customers.
• Lead AMD Ryzen PRO branding and strategy to differentiate, position for penetration into commercial segment
• Drive alignment with customers, vendors and partners for feature launch, co-marketing/co-messaging and legal agreements
• Drive launch plans, messaging, sales collateral/training as well as presenting at sales and customer summits

San Francisco, CA, US

Advise and provide technology insight related to Cybersecurity, SASE, data security in cloud and embedded technology.

San Jose, California, US

Product/Program Leadership* Drive product strategy, program execution, segmentation, use-case prioritization, roadmap based on customer and market needs to meet business goals* Lead cross-functional teams to build cohesive product strategy, pricing and drive sales process* Clear communication with C suite, internal stakeholders, partners and.

Koto-ku, Toyosu, Tokyo, JP

Create platform solution targeting IoT applications with focus on edge computing, software platforms and SaaS applications. Lead and influence global teams to perform market research, gather customer requirements, enable competitive analysis, technology assessment and create products. Collaborate with Sales and Segment marketing, Regional marketing.

Chandler, AZ, US

* Hire and build teams* Leading design and test teams in a matrix organization on a project to redefine strategies to improve product quality, production yield and hence improve profit margins. This has unified the design to test flows and cut the production cost by 20%.* Worked on product definition, planning and taken lead role in establishing unified.

Chandler, AZ, US

• Lead the integration and front-end design effort on new 90nm product family. Worked with Architecture, Test and Applications team to define the product specification and work closely with a team in India and Chandler.
• Managed Design-for-test implementation and enhancements on multiple projects and implemented several enhancements to meet product requirements. The new methodologies led to successful product launch of low pin count.

Chandler, AZ, US

• Took up the challenge to lead the design for test effort at a critical stage of the project. This was a flagship product that was supposed to define the future success of PIC32 products.
• Being a quick learner and ardent observer, I was able to settle into the new role very quickly.
• Worked with other groups and team members to resolve the pending issues and enhancements in a timely manner.
• Worked with cross-functional teams to successfully stream-out and release the product.

Chandler, AZ, US

• Worked on several design projects as individual contributor with constant emphasis on flow improvements, architectural enhancements, design process improvements and clear communication.
• Successfully designed some complex designs closely working with architects. I also suggested some early design changes to optimize cycle time.
• Participated in high level technology improvement meetings and quickly built professional relationship with members of other divisions.
• Attended conferences and Microchip trade shows.
• Worked on several communication and storage protocols such as USB, Ethernet, SPI, I2C, SATA, SAS, PCI.

Led $2M revenue project during restructuring of Semiconductor Company. Interfaced with teams from Japan and Korea. Directed project strategy and status presentation to the Panasonic management team.Strategically designed new product through joint venture. Project scope integrated sophisticated software with protocol analyzer hardware of Partner Company and.

Consulted on a new flagship product (Serial ATA, SCSI) at Adaptec.Involved in product definition and design. Worked closely with Architecture, Design and external consulting firm to successfully finish the project. Coordinated effort to develop FPGA prototype of Out of Band(design), serializer and de-serializers for the PHY. Verification of the Link/Phy.

Master Of Business Administration (Mba), Global Management

Mba Project, International Business

M.S., Electronics And Electrical Engineering

B.E., Electrical Engineering