- Worked in a team of 16 engineers to characterize, design and verify 14nm and 16nm IP- Designed a custom clock buffer and performed simulations to measure and verify fan out, duty cycle distortion, jitter and transient response in 14nm/16nm finfet technology- Setup and performed HSPICE simulations to generate liberty timing models for multiple macros- Produced design documents summarizing design specifications and simulation results for several customers- Developed and maintained scripts to simply IP verification and delivery- Maintained, verified and updated CAD tools for multiple design teams

- Performed schematic and layout verification between project milestones- Performed post silicon analysis on a variety of GPU’s- Compiled validation reports for internal use as well as for customers- Designed and tested a high performance lever shifter for multiple PLL macros- Characterized custom latches and flops and ensured that timing conditions were met- Performed sizing modifications on AMD standard cells to prevent glitches and timing violations

- Developed a database that generates production reports and forecasts financial earnings based on daily production results- Created a visual user interface using macros and VBA- Simplified the user interface based on employee feedback- Currently being using by two Kraft locations in Canada. Has removed the need for paper based reports and provides supervisors with the means for investigating downtime related issues- Collaborated with the managerial and engineering staff when making design decisions- Trained and monitored employees responsible for using the database- Created a shared network that allows multiple users simultaneous access to the database through any plant computer