Ben Ockmore Email & Phone Number

Cambridge, England, United Kingdom

I lead Arm's physical implementation team working on System Memory Management Unit (SMMU) IP. We ensure that each SMMU developed by Arm is well-designed and tapeout-ready, building on the success of the MMU-700 and MMU-600 products, which we also help to support.

Cambridge, United Kingdom

I led physical implementation activities during the development of Cortex-A5 DesignStart. After the completion of that project, I was subsequently part of the effort to create the prototype SoC developed for the Arm Morello Program, developing the chip-level layout, leading clock domain crossing signoff activities, and guiding junior engineers through a variety of tapeout challenges.

Cambridge, United Kingdom

I performed physical implementation trials for a variety of system IP developed by Arm. Within this role, I helped to drive the tape out of the Neoverse N1 SDP SoC, and led an activity to improve implementation process efficiency.

Cambridge, United Kingdom

Developed my implementation and scripting skills while working on physical implementation of an advanced process node design. Within this project, I was responsible for placement and routing of parts of the interrupt controller and debug subsystems, as well as the system control processor and complex clock generation logic. I also strove to improve the feedback provided to front end development teams to accelerate improvement of IP quality.

Cambridge, United Kingdom

Working within the CPU Design and Verification team on an upcoming processor. Responsible for creating a SystemVerilog test bench to verify that supporting IP for one of ARM's latest processors functions according to the relevant specifications.

Cambridge, United Kingdom

Worked in the Cores Implementation team on the Cortex A53 processor. I was responsible for ensuring that things didn't go wrong due to changes in the processor design, and reporting variations in PPA to senior engineers.