Compute subsystem architecture

Leadership and management of an ASIC design team* Continued hands-on engineering * Thoughtful delegation aligned with ICs' career objectives * Coaching ICs in logic design and debug * Supported ICs to achieve deliverable targets (quality, schedule)

Tech lead and designer of MAC for satellite network SoC• Owned several microarchitecture documents from blank page to final spec• Designed and implemented DMA controllers for AXI channels• Designed and implemented various interfaces • Defined programming model, implemented software interface (CSRs, interrupts)• Owned, configured, integrated Synopsys ARC HS4x dual-processor core• Owned, integrated custom 3rd-party cryptography cores• Configured, integrated DesignWare crossbars and bridges• Extensive waveform debug• Designed and implemented error handling modules and positive status trackers • Work with DV to create new test plans and drive them to closure• Edited SDC files, worked with back-end team to close timing and floorplan• Essential in supporting software bring-up and emulation debug

MAC Microarchitecture and Implementation

Micro-architecture and RTL implementation of image signal processor IP • Documentation and design • Low power/cost logic design, RTL coding with Verilog, Perl in-house code-gens • Debugging, root cause analysis through waveforms, assertions • AXI4 specification to implement client interfaces • Memory access patterns for optimal transaction modes • Bash scripting (some Python) for task automation, log parsing • Simulation using VCS, constrained random UVM environment, C++ reference • Performance testing and tuning • Synthesis, static timing analysis, Boolean equivalence • Functional and code coverage utilities to close verification effort

Functional Validation of DSP core • C++ application coding to verify core features using FPGA • Python scripting for automation API for auto-checking, regression, data visualization

Design Verification of MAC-PHY combo for wireless Video/USB• Developed numerous directed testcases in embedded C, ARM7 • Microarchitecture and RTL implementation of bridges, clock domain crossing • Perl scripting for task tracking automation (between spreadsheets, test lists)

Implementation and verification of low-power server SoC• Integrated the system control subsystem with ARM Cortex core, RAMs, peripherals • Implemented AMBA bus infrastructure using AMBA Designer • Developed testcases in embedded C to test early subsystem • Created initial VMM test environment and leveraged RAL • Simulated the subsystem with VCS

Micro-architecture and implementation of camera, video compression, and DSP IP • Various DMA engines • Video buffers with AES cipher logic • Video pattern detection, stream manipulation • Camera mechanical shutter control • CCD sensor exposure control, substrate clocking, pixel interfaces Knowledge/Skills Practiced• Documentation and design presentation • Low power, low cost RTL design using Verilog and SystemVerilog • Clock domain crossing • Collaboration with software team to develop programming models • Integration of 3rd party AES-128 encryption core • Simulation using VCS with constrained random VMM environment • Synthesis, static timing analysis, Boolean equivalence • FPGA synthesis, system validation, lab work • Physical design, floorplanning, power grid design• Auto-Place-and-Route, clock trees synthesis, full-custom standard cell layout

Refactored C source code of existing Automated Fingerprint Identification System (AFIS) software