Brian Chen Email & Phone Number

台灣 新北市 新北市

Taiwan

Responsibility High Speed Serial Data TX/RX PHY layer testing expertise, system verification and IC characterization by oscilloscope (USB, DisplayPort , Type-C, DDR, SD, HDMI, eDP, V-by-One, LVDS, MIPI and Ethernet applications) Early engage customers by cross-functional driving technical and marketing resource Coordinate and align organization (by work with engineering and PM team) to resolve customer's issue, deliver proper solution, develop test coverage and test plan to maintain business growth With failures occurred, take technical lead in resolving customer’s issues (find out root cause and provide solution suggestion) during product lifecycle Work with suppliers (Wilder-Tech) to develop Type-C test fixtures in order to ensure correct functionality and quality in early stage. Build Python code for customer special demand engagement Display technology understanding/survey, strategy plan feedback, allied with ATC lab, product promotion (SWOT analysis, VOC, create preference in pre-sale and issue solving in post-sale) PM role to work with Marketing team for NPI status; solution promotion by supporting TIF（Tektronix Innovation Forum）and MTE（Meet Technical Expert）events in Taipei, Hsin-chu, Beijing, Shanghai and ShenzhenAchievement Digital display (HDMI and DP) business has over 15% Y2Y growth every between 2012~2015; HDMI business achievement has 50% growth in 2015 by VOC and solution improvement NPI mid-range scope (MDO serious) business has over 10% Y2Y growth between 2014~2016 Jack Murdock award and Master award for business contribution in 2014 and 2015. Co-work with ATC (Authorized Test Center) closely, they adopt our main stream performance solution in 2015.

Taiwan

 MMC/SD hardware controller IC design（VHDL、C code） Perform design simulation（code level、gate level）and synthesis in Linux O/S environment Perform MMC/SD hardware FPGA verification after design Responsible for MMC/SD and NAND flash debugging by Logic Analyzer and oscilloscope when failures occurred

Taiwan

 New server platforms verification（ECC/ChipKill func. and failure syndrome decoding） Familiar with Oscilloscope and Logic Analyzer DRAM refresh time and decode by Logic Analyzer Debug DDR2-400 & 667 & 800 RDIMM/FBDIMM 70nm DDR3 DRAM and DDR3 RDIMM debug 0.14um ~ 70nm DRAM and DIMM initial R&D（thermal and power consumption evaluation、SI measurement）  Responsible for RDIMM clock skew and co-work with HP Qual. Center Take AMD ACE margin tool course in US and responsible for DDR2-667 & 800 RDIMM margin by ACE tool Responsible for new raw card design project in system level verification（R/C AF）and register this new R/C in JEDEC Join new product development（0.14um~70nm）and make them pass internal SPQL/system verification Evaluate PLL/Reg.（RDIMM）and AMB（FBDIMM）for new server DIMM project Provide OEM customers ES & CS, then make sure these can pass OEM AVL test RMA for new product R&D Co-work with FAE and PM teams to go through the D-flow of server DIMM（RDIMM、FBDIMM） Co-work with FT team and implement new screen pattern into production line Standing for R&D team to join NTC delegation and win Taiwan Excellence Award for two consecutive years, 2007-2008

Master Of Engineering (Meng), Engineering

Bachelor Of Engineering (Beng), Engineering