In semiconductor field, I have experience of Product Engineering in TSMC and Technical Development in VIS. My professional scope includes device development, technology development, new technology transfer from IBM and STM, wafer processing, testing, reliability qualification and new product release into production. SiEn / Product Engineering and Technology Transfer, Director (1.7 years, staff x20)2020 -- Present Transfer 40LP technology from STM 1. Host 40LP transfer meeting for TPQV, SRAM, Process, Reliability Qual.2. Project preparation for 28nm (Poly-SiON and HK/MG).3. Host regular yield meeting and establish yield improvement procedure.AMS / Device Engineering and Electrical Test, Director (2 years, staff x10)2017 -- 2020 Transfer technology from IBM in wafer process and device characterization.1. PCM testkey design for 40nm project NTO.2. Coordinate Keysight and TEL and custom build PCM tester.From IBM, transfer and demomstrate device characterization successfully.VIS / TD_PIE Technical Development, Technical Manager (8 years, staffx6)2008 -- 2016 Develop new device and process1. TCAD, testkey design, NTO, device characterization to meet process reliability. 2. Deliver PDK, Design rule (EDR/LDR), device list, SPICE, sample layout.TSMC / Product Engineering, Advanced Project Leader (8 years, staffx2)2000 -- 2008 Job function covered SRAM and Mass-Production yield improvement: Yield analysis, correlation, Failure Analysis, Fab process stability, Customer handling, NTO and New Product Introduction.1. Lead product team and provide total solution to customer. NV, Microsoft, MediaTek, Marvell. 2. N65/N80/N90/C011/C013 baseline yield improvement. 3. Drive new production by enlarging process window and solving Si issue 4. Interact with customer and package house to solve product issue. 5. Trouble-shooting skill, process and product yield improvement. PFA, EFA, SFA, layout tracing, SRAM Bitmap/Vccmin, shmoo
Sien (Qingdao) Integrated Circuits Co., Ltd.
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Director Of Product EngineeringSien (Qingdao) Integrated Circuits Co., Ltd. Dec 2020 - PresentQingdaoTransfer 40LP technology from STM and Yield Improvement[1] Host 40LP transfer meeting for TPQV, SRAM, Process, Reliability Qual.[2] Project preparation for 28nm (Poly-SiON and HK/MG).[3] Host regular yield meeting and establish yield improvement procedure.[5] NPI and yield improvement on C015BCD SRAM and products, HVCMOS, PowerMOS.
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Device Engineering And Electrical Test DirectorJiangsu Advanced Memory Semiconductor Corp., China Oct 2017 - Mar 2020中國 江蘇IBM technology transfer in wafer process and device characterization [1] Process and Cell array testkey new design for 40nm project NTO. [2] Coordinate Keysight and TEL and custom build PCM tester. [3] Transfer and demonstrate IBM device characterization successfully.
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Manager/Front-End Supplier ManagementOmnivision Technologies, Inc. Sep 2016 - Jun 2017TaiwanFoundry Management and Define Responsibility/KPI [1] Silicon wafer and color filter supplier management.[2] Define key issue, drive action and review progress.[3] Cross function team work of Foundry, Assembly, Test.[4] NPI, Mass production: key issue solving, mechanical and electrical yield, delivery, response to Headquarter.[5] Supplier management, resolve mass production issue to meet delivery.- Taiwan supplier: TSMC, PTC, Visera, TCE- China supplier: HLMC, XMC, TSESCustomer visit and audit (ZF TRW, Continental) -
Technical ManagerVanguard / 世界先進 Oct 2008 - Aug 2016台灣 新竹縣市Develop new device and process[1] TCAD, testkey design, NTO, device characterization to meet process reliability. [2] Coordinate TCAD/Layout/Fab module/reliability teams for device development.[3] Deliver PDK, Design rule (EDR/LDR), device list, SPICE, sample layout.[4] Patent: US x8 and Taiwan x12 -
Team Leader Of Product Engineering And Advanced Process ProjectTsmc / 台積電 Jun 2000 - Aug 2008台灣 新竹縣市Job function covered SRAM and Mass-Production yield improvement: Yield analysis, correlation, Failure Analysis, Fab process stability, Customer handling, NTO and New Product Introduction.[1] Host yield meeting and coordinate INT/Photo/Etch/Diff/TF to improve CP/FT yield and in-line defect.[2] Coordinate Customer/Fab/Assembly/Test to solve product level issue. [3] SRAM/NPI/MP yield improvement, failure analysis, customer handling.[4] Key Achievement- Lead product team and provide total solution to customer. NV, Microsoft, MediaTek, Marvell. - N65/N80/N90/C011/C013 baseline yield improvement. - Drive new production by enlarging process window and solving Silicon issue. - Trouble-shooting skill, process and product yield improvement. PFA, EFA, SFA, layout tracing, SRAM Bitmap/Vccmin, shmoo.
Bryan Chang Education Details
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Electronic Engineering -
Electrical Engieering
Frequently Asked Questions about Bryan Chang
What company does Bryan Chang work for?
Bryan Chang works for Sien (Qingdao) Integrated Circuits Co., Ltd.
What is Bryan Chang's role at the current company?
Bryan Chang's current role is Director of Product Engineering, TD/PIE Engineering, Device Engineering.
What schools did Bryan Chang attend?
Bryan Chang attended National Chiao Tung University / 國立交通大學, National Central University / 國立中央大學.
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