Çağrı Erbağcı Email & Phone Number

Pittsburgh, PA, US

Santa Clara, CA, US

Design and verification of novel custom SRAM macros used in NVIDIA products

-“Turkish Republic Day Ball 2023” - Organization of Ball for 200 people in Pittsburgh to celebrate 100th anniversary of the Rebublic of Türkiye-“Container Housing for Turkey Earthquake Victims Project” in collaboration with Brother’s Brother Foundation (BBF) & CMU Turkish Alumni Association – Fundraising of $90000 to purchase 12 containers in DEIK Town.

Pittsburgh, PA, US

Pittsburgh, PA, US

Pittsburgh, PA, US

Projects in Integrated Circuit Design: First Silicon - 18726 Testing of the chips designed by students in 18725I was responsible from:-Giving tutorials on PCB design.-Demonstrating remote control of instruments used in testing and how to create input vectors using PYNQ board.

Pittsburgh, PA, US

Advanced Digital Design - 18725. Student teams create a moderate-sized digital, analog/RF, or mixed-signal chip in an industrial 28nm process using industrial CAD tools and flows. The project involves planning and specification, writing a Verilog model, designing custom circuits and/or synthesized standard cell blocks, creating a testing/debug strategy.

İstanbul, Kadıköy, TR

Santa Clara, CA, US

-Noise analysis on novel, dual-rail SRAM macros with asynchronous clocks, designed by FCM team.-Novel negative-bitline generation idea analysis (ISF submission within Nvidia)-Analysis of potential issues in SRAM macro wake-up

Cupertino, California, US

Aging simulations and power optimizations of SRAM memories designed by custom design team.

Lausanne, Vaud, CH

Design and implementation of ultrasonic energy harvesting circuits for deep implanted medical devices in a commercial 180nm bulk CMOS process (schematics and layout)

Lausanne, Vaud, CH

EE203 - Electronique II

Marin, CH

Internship RFID - Digital designRFID digital power optimization analysis for a commercial 110nm bulk CMOS process. The analysis consists optimizations in library, design and architecture.

Lausanne, Vaud, CH

Design and implementation of a low-power PLL for sub-1GHz applications in a commercial 65nm bulk CMOS process (schematics and layout)

Pittsburgh, PA, US

Design and implementation of a static FPGA fabric. Full-custom design of a static FPGA tile fabric as part of a secure FPGA research project in a commercial 65nm bulk CMOS process (schematics and layout). The baseline static FPGA design is compared against the secure FPGA fabric in terms of VLSI metrics (area, power, delay).

Istanbul, Istanbul, TR

Design and implementation of a CMOS Read-out IC for SiGe Multiple Quantum Well Bolometer Detectors. Full-custom design of 80x60 read-out array in a commercial 150nm bulk CMOS process. (schematics and layout)

Istanbul, Istanbul, TR

ENS 203 - Electronic Circuits I

Pittsburgh, PA, US

I worked as a research intern to be part of the project "designing secure logic gates against reverse engineering" under supervision of Prof. Ken Mai during Summer 2015. I have succeeded full custom design and implementation of the logic family. Also, I have performed Monte Carlo Simulations to make sure that it will be functionally working after possible.

Doctor Of Philosophy - Phd, Electrical & Computer Engineering

Master'S Degree, Electrical & Computer Engineering

Master'S Degree, Electrical And Electronic Engineering

Bachelor'S Degree, Elektrik Ve Elektronik Mühendisliği

95.78/100, High School