Sreedhar Chikoti Email & Phone Number

Domain skills : ASIC Design, Digital Design, RTL design, VLSI, Computer Architecture, Timing, Debug, CDC, STA fundamentals, Clock design, Functional/Physical clocking, and DFT clockingSpecialities : Continuous improvement, identifying inefficiencies and drive change, problem solving, drive decision making in a highly cross-functional setup, working in fast paced environments. High EQ(emotional quotient), influencing and leading, assertive communication, continuous learning, highly motivatedInterested in - ASIC design and product management opportunities. Feel free to message me if you are looking for any information that I can help with (mentoring, advice, etc). I try my best to respond to every message ( but, if I don't, it just means I am busy or don't find myself to be able to help ).

Listed skills include Asic, Vlsi, Computer Architecture, Verilog, and 27 others.

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  Sr. Asic Design Engineer

  Nvidia

  Jul 2008 - Present - Santa Clara, Ca, Us

  - Lead and architect for dft clocking for several GPU/Tegra chips- In-field/system testing clocking architect - Bringup and silicon-debug for key post-silicon issues - Functional and dft (test) clocking design for multiple GPU and Mobile chips- Clock physical distribution - Chip characterization, noise measurement circuit design- DFT/DFD fullchip clocking verification - Verification of texture sub-units- CDC alleviation strategies