Cass A. Email & Phone Number

Austin, Texas, United States

Austin, Texas Area

Worked on Instruction Cache (IC) unit verification. I was responsible for the IC data model and checking IC data forwarded down to the Decode unit.Previously, verified parts of IC/ITLB block on Ryzen 2000/3000 series processors using an UVM test bench written in SystemVerilog. This included the ITLB Model used in checking, ITLB memory map and stimulus, Micro-Op Cache stimulus, L2 data model and stimulus, and L2 Probe stimulus. Gave technical direction to IC/ITLB block verification engineers for the Ryzen 3000 series processor. Verification experience includes writing test plans, writing assertions, modeling, writing checkers, debug, bug tracking using Jira, nightly regressions, and coverage analysis. I also enjoy mentoring newly hired engineers. I have shipping silicon in laptop, desktop, game console, and server spaces as well as in the cloud.

Austin, Texas Area

Developed as part of a team a reference platform for the 8641D Power PC microprocessor. Responsible for the power supply circuits and sections of the south bridge. Researched all power supply components for the PCB design. Selected power chip controllers, inductors, resistors, (load, feedback, and output ripple) capacitors to develop about 8 different power supplies.

Austin, Texas Area

Developed C++ performance models for PowerPC microprocessors. These timing models were derived from a set of base classes that included structures such as n-input muxes, pipelines, and communication ports between classes. Coded the L2 cache models for both the e500 and e600 microprocessor models. The cache model contained data structures for cache line state/data and enforcement of MEI coherency protocols.

Austin, Texas Area

Responsible for portions of the test bench for the sequencer block of a PowerPC microprocessor. The C++ verification environment was behavioral, interface monitor, and logic irritator/driver code blocks. Other duties included debugging test failures, running regressions on sim farms, making test bench releases to logic designers, declaring sequencer “Gold” model.

Austin, Texas Area

Developed embedded computer systems conforming to the VXI bus specification. Responsibilities included chip selection, schematic entry, system verification and debug using oscilloscopes and logic analyzers. Managed board layout, mechanical assemblies, and manufacturing issues. Experienced designing Pentium, Pentium II systems, video controllers, SCSI controllers, 10/100 Base-T ethernet controllers, and super I/O chips (floppy, serial, and parallel ports).

Meee, Electrical Engineering

Bachelor Of Science - Bs, Electrical Engineering