- Develop Python Framework for GenAI apps development- GPU Design Verification, C++ Firmware Development, Methodologies and Automation Workflows Developer. - Develop C++ firmware ARM embedded processor. - Random Constraint Verification of Texture Flag Cache GPU block. - Own scripts to automate register generation, RTL generation and connectivity, code development analytics, source control management, code sharing, bug tracking. - Define the Source Control Management flows for the entire GPU Team. Provide documentation, training and support to the entire team.

- Co-founded startups on Video Streaming, Virtual Reality and FinTech. Worked as CTO, from product conception to launch: product definition, business model and strategy, technical requirements, customer use cases, marketing and UI design. Improved knowledge in methodologies architecture, software development, leadership, teamwork and project management.

Graphics IP - Design Verification (San Diego, CA)- GPU IP and Display IP Top Level Design Verification Lead. - Automated integration of sub-blocks IPs into the Top Level environment. - Developed scripts to connect CVS source control with ClearQuest bug tracking tool. Display IP - Design Verification (Toronto, Canada)- Pre-Silicon HW Design, Design Verification and Post-Silicon Product and Test Engineering of AMD Discrete GPUs and Chipset. Features: reset, clocking, power management, power gating, voltage control, thermal control, DFT JTAG, microcode. - ATE Test generation, test planning, coverage analysis and closure. Scan ATPG patterns generation and fault analysis.

- Pre-Silicon HW Design, Design Verification and Post-Silicon Product and Test Engineering of AMD Discrete GPUs and Chipset. Features: reset, clocking, power management, power gating, voltage control, thermal control, DFT JTAG, microcode.

- ATE Test generation, test planning, coverage analysis and closure. Scan ATPG patterns generation and fault analysis.

- Post-Silicon Product and Test Development for CPU Cache Memories using a Programmable BIST Engine. Pre-Silicon Design Verification of Programmable BIST Engine.

- Developed a software model of the NGBI Bench TDS 3000.- Created a mathematical application that analyses the collected data and calculates the power model.