Senior Electrical Design Engineer
Current- Nominated and recognized as a high-performance employee in the all-hands meeting
- 100% accuracy improvement in failure detection by developing a data analysis algorithm usingDBScan and Random Forest to classify 4 categorical failure modes based on 2-parameter data (forDBScan), and multi-parameter.
- Redesigned BMS board for next generation OCV/ACIR, with 4 additional self-test features, 4x costreduction, 300x improvement in reliability (500k cycles tested in factory), 4x time reduction in systeminstallation from.
- Introduced automatic termination mechanism for CAN multinode circuit chain for the next generationsystem, with 3x reduction in software communication failure, 3x reduction in labor, and time to installand debug.
- Introduced mechanical design to prevent cell punctures from loose pogo pins. Resolved a potential firerisk that could cause over $500k in damage to the factory.
- Scope of work: