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Chen-Chi Lo Email & Phone Number

ASIC performance architect at 谷歌
Location: Taipei City, Taiwan, Province of China 7 work roles 2 schools
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Current company
谷歌
Role
ASIC performance architect
Location
Taipei City, Taiwan, Province of China
Company size
219238 employees

Who is Chen-Chi Lo? Overview

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Quick answer

Chen-Chi Lo is listed as ASIC performance architect at 谷歌, a with 219238 employees, based in Taipei City, Taiwan, Province of China. AeroLeads shows a matched LinkedIn profile for Chen-Chi Lo.

Chen-Chi Lo previously worked as Senior Staff Engineer at Sifive and Senior Manager at Bitmain. Chen-Chi Lo holds M.S. With Distinction, Dsp And Communications, Electrical Engineering from 國立臺灣大學.

Company email context

Email format at 谷歌

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谷歌

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Profile bio

About Chen-Chi Lo

● Expertise in electronic system level (ESL) modeling for architecture exploration and validation.● Proficiency in architecture design of AI accelerator, SoC QoS/memory system, as well as data center networking switch.● Proven leadership in planning/managing tasks/project, classify, analyze and resolve critical issues, and growing a team quickly to work efficiently.● Mastery of chip design, integration, verification, FPGA and familiar with digital design flow.

Listed skills include Semiconductors, Embedded Systems, Ic, Asic, and 25 others.

Current workplace

Chen-Chi Lo's current company

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谷歌
谷歌
ASIC performance architect
mountain view, california, united states
Website
google.com
Employees
219238
AeroLeads page
Company profile
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7 roles

Chen-Chi Lo work experience

A career timeline built from the work history available for this profile.

Asic Performance Architect

Current
谷歌

ASIC architecture modeling, exploration and validation for QoS/memory system

Aug 2020 - Present

Senior Staff Engineer

Sifive

System performance modelingRISC-V processor design and verification

Mar 2019 - Aug 2020

Senior Manager

Bitmain

Taipei

Architecture performance modeling

Jul 2018 - Jan 2019

Senior Asic Manager/ Project Leader

Montage Technology, Inc

Lead ASIC team in digital design and front-end flow enhancement. Issue tracking and sharing to upgrade team ability in design/Lint/DC/Mbist /UPF/Formality.

Sep 2017 - Jun 2018

Soc Architect / Project Leader

Montage Technology, Inc

Taipei

Lead WiFi-AP SoC from architecture, micro-architecture, RTL design, verification, FPGA emulation to tape-out

Feb 2016 - Aug 2017

Performance Architect

聯發科

Hsinchu, Taiwan

Data path modeling and architecture exploration for data center network switch

Oct 2012 - Jan 2016

Senior Engineer

聯發科

Hsinchu, Taiwan

ASIC design and verification

Nov 2007 - Oct 2012
Team & coworkers

Colleagues at 谷歌

Other employees you can reach at google.com. View company contacts for 219238 employees →

JL Joanne Luzon Joanne Luzon Colleague at 谷歌Metro Manila, Philippines View → FN Franki Noriegausuu Franki Noriegausuu Colleague at 谷歌Tampico, Tamaulipas, Mexico View → MW Matthew Wettlaufer Matthew Wettlaufer Colleague at 谷歌Escondido, California, United States View → TB Tools Boxseo Tools Boxseo Colleague at 谷歌Sens, Bourgogne-Franche-Comté, France View → DB Dina Bashkirova Dina Bashkirova Colleague at 谷歌Seattle, Washington, United States View → GH Gs Hd Gs Hd Colleague at 谷歌Cairo, Egypt View → AN Aline Nachlas, Phd Aline Nachlas, Phd Colleague at 谷歌San Francisco Bay Area, United States View → RR Rich R Rich R Colleague at 谷歌Bengaluru, Karnataka, India View → VO Viviane Oliveira Viviane Oliveira Colleague at 谷歌São Paulo, Brazil View → UT User1109620 Test User1109620 Test Colleague at 谷歌Cupertino, California, United States View →
2 education records

Chen-Chi Lo education

M.S. With Distinction, Dsp And Communications, Electrical Engineering

國立臺灣大學

Honors: Presidential Award 2005-2006 (Top 2 academic performance)

B.S., Communications Engineering, Electrical Engineering

國立交通大學

Honors: Presidential Award 2003-2004 (Top 3 academic performance)

FAQ

Frequently asked questions about Chen-Chi Lo

Quick answers generated from the profile data available on this page.

What company does Chen-Chi Lo work for?

Chen-Chi Lo works for 谷歌.

What is Chen-Chi Lo's role at 谷歌?

Chen-Chi Lo is listed as ASIC performance architect at 谷歌.

Where is Chen-Chi Lo based?

Chen-Chi Lo is based in Taipei City, Taiwan, Province of China while working with 谷歌.

What companies has Chen-Chi Lo worked for?

Chen-Chi Lo has worked for 谷歌, Sifive, Bitmain, Montage Technology, Inc, and 聯發科.

Who are Chen-Chi Lo's colleagues at 谷歌?

Chen-Chi Lo's colleagues at 谷歌 include Joanne Luzon, Franki Noriegausuu, Matthew Wettlaufer, Tools Boxseo, and Dina Bashkirova.

How can I contact Chen-Chi Lo?

You can use AeroLeads to view verified contact signals for Chen-Chi Lo at 谷歌, including work email, phone, and LinkedIn data when available.

What schools did Chen-Chi Lo attend?

Chen-Chi Lo holds M.S. With Distinction, Dsp And Communications, Electrical Engineering from 國立臺灣大學.

What skills is Chen-Chi Lo known for?

Chen-Chi Lo is listed with skills including Semiconductors, Embedded Systems, Ic, Asic, Soc, Debugging, C, and C++.

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