Soc Pre-Silicon Verification Engineer
CurrentWorking on Formal Property Verification on Intel Server Chips (Diamond Rapids)
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Chirag Chikgondally Math is listed as Formal Verification Intern @ intel | Techinal Chair, IEEE Student Branch at ASU | MS in Computer Engineering, ASU | Digital Design | Digital Verification | RTL Design at Intel Corporation, a with 133841 employees, based in Tempe, Arizona, United States. AeroLeads shows a matched LinkedIn profile for Chirag Chikgondally Math.
Chirag Chikgondally Math previously worked as SOC Pre-Silicon Verification Engineer at Intel Corporation and Technical Chair at Ieee Student Branch At Asu. Chirag Chikgondally Math holds Master Of Science - Ms, Computer Engineering from Arizona State University.
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I am a student pursuing MS in Computer Engineering at Arizona State University. I have a bachelor’s degree in Electronics and Communication from Indian Institute of Information Technology, Design and Manufacturing, Kancheepuram. I have a strong background in Computer Architecture, Digital Systems and Circuits, VLSI design, Verilog, SystemVerilog and UVM. I am interested in applying my skills and knowledge to design and develop innovative and efficient hardware solutions.
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Santa Clara, California, United States
Working on Formal Property Verification on Intel Server Chips (Diamond Rapids)
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Janice Wilkins
Colleague at Intel CorporationRedwood City, California, United States
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SR
Sant Ritu Awadh
Colleague at Intel CorporationKakori, Uttar Pradesh, India
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CP
Citlali Pardo Maldonado
Colleague at Intel CorporationZapopan, Jalisco, Mexico
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OJ
Oducha Jayesh
Colleague at Intel CorporationAhmedabad, Gujarat, India
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GG
Glen Gonzalez
Colleague at Intel CorporationColorado Springs, Colorado, United States
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RC
Robert Cone
Colleague at Intel CorporationPortland, Oregon, United States
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KA
Kriti Agarwal
Colleague at Intel CorporationBeaverton, Oregon, United States
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GM
Georgia Modoran
Colleague at Intel CorporationHillsboro, Oregon, United States
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YZ
Yosi Zohar
Colleague at Intel CorporationIsrael
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SV
Sale Venkatesh
Colleague at Intel CorporationKurnool, Andhra Pradesh, India
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Chirag Chikgondally Math works for Intel Corporation.
Chirag Chikgondally Math is listed as Formal Verification Intern @ intel | Techinal Chair, IEEE Student Branch at ASU | MS in Computer Engineering, ASU | Digital Design | Digital Verification | RTL Design at Intel Corporation.
Chirag Chikgondally Math is based in Tempe, Arizona, United States while working with Intel Corporation.
Chirag Chikgondally Math has worked for Intel Corporation, Ieee Student Branch At Asu, Cognizant, and 4Climate.
Chirag Chikgondally Math's colleagues at Intel Corporation include Janice Wilkins, Sant Ritu Awadh, Citlali Pardo Maldonado, Oducha Jayesh, and Glen Gonzalez.
You can use AeroLeads to view verified contact signals for Chirag Chikgondally Math at Intel Corporation, including work email, phone, and LinkedIn data when available.
Chirag Chikgondally Math holds Master Of Science - Ms, Computer Engineering from Arizona State University.
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