Senior Design Engineer
Armonk, New York, Ny, Us
Development Engineer IBM - Networking Hardware Division, RTP, NC, 1994 - Dec 1999 IBM - TJ Watson Research Center, Hawthorne, NY• PowerPC processor control point architecture and development for L3 Ethernet switches, 2216 multiprotocol router and 2212 low end router. • PCI bus analysis and development to support hot plug and hot swap interfaces in router and switch applications.• Verilog PLD and FPGA development for performance critical and peripheral interfacing within control point designs.• Provided division-wide architecture direction to maximize reuse and performance while minimizing cost over many processor based switch and router products. • Field and development support for 2216 multiprotocol router, 2212 low end router and new L3 Ethernet switching development. Development Engineer IBM - TJ Watson Research Center, Hawthorne, NY, 1992 - 1994 High Performance Computing and Communication Group• Developed a proprietary fiber-optic 1Gbps microchannel network adapter for a 1Gbps ring network research project, called Orbit and PlaNET. Coordinated the design, simulation, high speed PCB layout, and testing during development at a vendor site.Software Engineer IBM - TJ Watson Research Center, Hawthorne, NY, 1991 - 1992 Parallel Systems Group (SP2)• Programmed a microcode kernel for interprocessor communication, memory paging and cache control for the Intel i860 processor based communications controllers within the IBM SP2 parallel processing system. • Performed high-frequency and bit error rate analysis of ECL differential twisted pair communications links between host processors and switch interfaces within the IBM SP2 system.Summer Intern IBM - TJ Watson Research Center, Hawthorne, NY, 1990 - 1991 Deep Blue Chess Project• Designed and programmed an interactive X Windows network interface for the Deep Blue chess computer in C with TCP/IP sockets for the IBM RS/6000.