Global Navigation Satellites Systems (GNSS) Receiver Software/Firmware DevelopmentImplement a real-time DSP on the SoC -A real-time embedded system using assembly code. Built a multi-GNSS receiver -A dynamic switch mechanism to schedule hardware co-relator configuration which could achieve supporting 9 different satellites signal simultaneously.GNSS measurement engine optimizationGNSS baseband hardware architecture design -Apply a C++ based C-Model for FPGA bit-true.DSP/hardware integration and design. -A well-designed new BeiDou B1C hardware co-relator which can save 70% RAM code size and acquire correct primary code index among 10230 hypothesis in 1 ms. (Normal receiver need 10ms)SoC Project Leader -Manage the IC Mass Production Flow and Risk Control