Server Soc Integration Intern
● Member of development team that performed assessment and created procedures for integrating next-generation partner IP in Intel AI server products● Created Python scripts to profile full-chip AI accelerator GPU RTL design versions using Synopsys NPI interface tool● Designed and implemented Verilog RTL IP signal gasket and used Synopsys Verdi to perform verification simulations● Developed method to detect and characterize variations in register address data for Intel AI accelerator product