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I work at the intersection of chip design and AI research where I am heavily involved in developing and deploying innovative solutions for complex and open-ended problems. I’ve had the privilege of working on multidisciplinary teams across the semiconductor, government, pharma, and academic research fields in a variety of individual contributor, technical lead, and management roles. My AI research interests include computer vision, multi-objective optimization (evolutionary and Bayesian), generative AI applications, deep learning model compression, neural architecture search, and graph neural networks.
Tenstorrent
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Principal Ai And Ml EngineerTenstorrentAustin, Tx, Us
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Senior Staff Design Engineer, Ai ResearcherIntel Corporation Dec 2023 - PresentSanta Clara, California, UsDeveloping innovative solutions for a variety of problem domains at Intel.Engineering activities include:• Memory compiler development on cutting-edge process technology nodes.• Designing AI-centric design automation and quality assurance tools.• Supporting competitive benchmarking efforts.AI/ML Research activities include:• Multi-objective optimization techniques applied to unique design automation problems.• Research and development of novel optimization solutions for generative AI / LLM / Transformer architectures. -
Lead Ai Research ScientistModern Intelligence Nov 2022 - Dec 2023Built out AI/ML solutions for a variety of government applications. • Rapid prototyping and benchmarking of novel deep learning computer vision algorithms (e.g., detection, classification, segmentation) and MLOps through Microsoft Azure. • Drove R&D effort for customizing Large Language Models (LLMs) to enable user-friendly UI/UX capabilities such as video-to-text summarization, Q&A, and document summarization.• Deep learning model compression and neural architecture search (NAS) for hardware-aware performance optimization to enable edge deployable computer vision applications. Fundamental research on pruning for sparse neural networks and linear mode connectivity. • Led scoping and enablement of multimodal/multi-view sensor fusion solutions (NeurIPS '23 publication) that beat state-of-the-art performance on re-identification benchmarks. • Supported business development efforts by developing ML system prototypes based on customer requirements and defining the R&D roadmap for emerging AI technology applications.• Applied evolutionary optimization techniques for accelerating automatic data augmentation.• Created generative AI prototypes (GAN, diffusion) for synthetic image dataset generation and cross-modal style transfer. -
Staff Ai Research ScientistIntel Labs Dec 2020 - Nov 2022Hillsboro, Or, UsPerformed research at the intersection of deep neural network algorithms and hardware (6 patents filed).• Developed hardware-aware neural architecture search (NAS) methods that leveraged bi-level optimization approaches paired with evolutionary algorithms. Resulted in a 4-10x speedup in the search process. • Demonstrated a method for joint hardware-accelerator and deep neural network architecture optimization across a variety of performance objectives. • Researched algorithmic approaches for exploring large-scale combinatorial search spaces as related to the modern chip design flow. • Adapted temporal graph neural network algorithms for business intelligence applications. -
Deep Learning Data ScientistIntel Corporation Jan 2019 - Dec 2020Santa Clara, California, Us• Built software framework to aggregate, categorize, and plot artificial intelligence research trends using academic graphs, conference data, and graph neural networks.• Developed a graph neural network citation prediction model to determine which recently published papers are likely to become the most popular. Paper presented at ICASSP 2020.
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Technical Design ManagerIntel Corporation Jan 2017 - Nov 2020Santa Clara, California, Us• Memory compiler architecture technical design lead on four generations of cutting-edge process technology nodes. • Developed lightweight programs and dashboards in Python to support competitive performance projections, quality assurance, and anomaly detection. • Served as a customer interface, project manager, and technical contributor for an interdisciplinary team spanning design, mask layout, and software.
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Senior Design EngineerIntel Corporation Jan 2011 - Jan 2017Santa Clara, California, Us• Novel memory circuit architecture research to enable best-in-class timing performance and lower power consumption. (7 patents granted)• Memory compiler development on leading-edge technology nodes to enable company-wide adoption of industry-standard foundry compilers.• SRAM circuit design, floor planning, timing convergence, and low power optimization for multiple novel technology nodes to meet customer performance specifications.
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Graduate ResearcherUniversity Of Florida 2006 - 2010Gainesville, Florida, UsUF Software & Analysis of Advanced Materials Processing Center (SWAMP):• Performed numerical physics modeling of solar radiation effects on modern space-borne electronics to predict soft-error rates in modern CMOS topologies. Funded by AFRL and NASA. (5 Publications)• Software tool development in C++/Tcl for the Florida Object Oriented Device Simulator (FLOODS) to enable adaptive grid techniques and extend strained-Silicon modeling capabilities.• Developed numerous physical models for radiation effects simulations including a novel process-induced stress mobility variation model for charge collection.• Consulting work for two companies: researched device-level SRAM reliability under extreme environmental conditions using various SOI manufacturing approaches. -
Technical Researcher (Co-Op)Naval Sea Systems Command (Navsea) May 2003 - Sep 2006Washington Navy Yard, Dc, UsGranted Final Secret Clearance, NATO Secret Clearance• Collected field experiment data for countermeasure systems and applied statistical methods for littoral capability success prediction. • Conducted physics-modeling, analysis, and simulated environment studies for various countermeasure systems.• Co-authored 428-page Department of Defense sensor technology report that recommended how remote electro-optic, thermal, microwave, and seismic technologies could be employed to support Homeland Security capabilities following 9/11.
Daniel Cummings Skills
Daniel Cummings Education Details
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University Of FloridaElectrical And Computer Engineering -
University Of FloridaElectrical And Computer Engineering
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University Of FloridaElectrical And Computer Engineering
Frequently Asked Questions about Daniel Cummings
What company does Daniel Cummings work for?
Daniel Cummings works for Tenstorrent
What is Daniel Cummings's role at the current company?
Daniel Cummings's current role is Principal AI and ML Engineer.
What is Daniel Cummings's email address?
Daniel Cummings's email address is da****@****tel.com
What schools did Daniel Cummings attend?
Daniel Cummings attended University Of Florida, University Of Florida, University Of Florida.
What are some of Daniel Cummings's interests?
Daniel Cummings has interest in Science And Technology, Education.
What skills is Daniel Cummings known for?
Daniel Cummings has skills like Semiconductors, Simulations, Matlab, Vlsi, Cmos, Ic, Electrical Engineering, Verilog, Microsoft Office, Physics, Python, Project Management.
Who are Daniel Cummings's colleagues?
Daniel Cummings's colleagues are Adam Young, Lazar Djurovic, Tejas Suresh, Prudhvi Saiteja Dasari, Kyungsik Kim, Jason Gunderson, Jovan Šerbedžija.
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