Hardware Verification Engineer
CurrentOverview – Engineer tasked with development of test system for cryptography acceleration and security subsystems RTL. Development of bench API's + DSL's, directed/functional testing, modeling, RTL-Model interfacing, device drivers Key Projects:Development in C and Risc-V Assembly for bench infrastructure (boot, link and build files) and API's to support development of security subsystem RTLDevelopment in ruby for generating randomized cryptographic algorithm and protocol instruction flow markup to be executed and verified by test systemDevelopment of system that creates data structures and configures RTL for simulationsWriting drivers for executing tests on silicon