David Manzi Email and Phone Number

Network performance validation for HPC/ML clusters

Worked on AI efficiency, particularly analysis and optimization of collective communication in ML training.

- TCP/IP, DPDK performance analysis and optimization on AMD EPYC products - Hacking the Linux kernel code to find performance optimization areas for Network and virtualization workloads

I assess and advise on hardware characteristics that affect virtualization software performance, develop and maintain in-house performance validation and analysis tools, write scripts to automate virtualization benchmarking and do performance optimization targetting a wide range of systems from single server setups to hybrid cloud infrastructures.

Graduate Research Assistant in the BRIDGE Lab: VLSI and Computer Architecturehttp://www.engr.usu.edu/bridge/index.htmlBelow are some of the project I have worked on:Designing a robust L1 cache operating in the near-threshold voltage regime. Analyzed typical L1 cache access pattern of popular mobile applications.  Modelled SRAM timing violations in L1 cache operating in near-threshold regime.  Proposed techniques to reduce timing violations by exploiting application spatial locality.Exploiting the processor-memory gap to design an energy efficient processor.• Compared processor-memory gap between near and super-threshold computing. • Device and architecture level power modeling in near-threshold computing. • Investigated the impact of voltage boosting of function units on the processor energy efficiency. Comparing GPU, CPU, and FPGA performance.• Implemented several parallel algorithms on CPU and optimized them for GPU. • Studied the effect of shared memory on the performance of GPU, CPU, and FPGA.Increasing processor life-time through balanced aging of the pipeline.• Power and temperature modelling for a pipelined processor. • Designed a C++ aging analyzer that estimates the post aging delay of each stage of a processor pipeline. • Proposed a technique to reduce aging imbalance among pipeline stages at design time. PUBLICATIONS:"Opportunistic Turbo Execution in NTC: Exploiting the Paradigm Shift in Performance Bottlenecks"Design Automation Conference (DAC) 2015

Big Data/ Graphics Processing Unit (GPU)Analyzing and offloading the workload of Apache Spark from CPU to GPU.

Grade homework and exams in the courses of Statistics and Visualization Languages

Developed a graphical software to be used in distortion of human gait. Called people to volunteer for experiments. Co-authored an article.Publication:Kim, S. J., & Mugisha, D. (2014). Effect of explicit visual feedback distortion on human gait. Journal of neuroengineering and rehabilitation, 11(1), 74.Chicago

Software development in VB.NET and C++