David P. Email and Phone Number
Technical Staff/Lead in Systems Hardware Applications Engineering with over ten years of experience in the Enterprise Storage products industry, high-speed SERDES (CXL, PCIe, and SAS/SATA) device support, validation, applications and customer support.Leading multiple next-generation device programs for Hardware Applications Engineering. Focused on excellent customer relations and support. Excellent in test planning, automation, validation of high speed ASIC devices and PCB designs. Hands-on HW, SW and FW experience. Participated in industry standards consortium and interoperability testing. Possess excellent leadership, cross-functional communication, organizational, interpersonal and technical skills.Technical Skills:- Tier-1 OEM and ODM customer support in the enterprise storage (CXL, PCIe, NVMe, SAS and SATA) products industry including PCIe switches, SAS/SATA controllers and expanders- Leading multiple next-generation enterprise storage device programs for Hardware Applications Engineering- Experienced in device validation of enterprise storage products, focusing on PCIe and SAS protocol and functional validation- Proficient in the use of commercial laboratory equipment such as real-time oscilloscopes, SAS / SATA and PCIe trace analyzers, logic analyzers, BERTs and exercisers.- PCB schematics capture, SI and layout design and review. Previously designed validation boards for storage product ASICs- Authoring technical products collateral including user guides, reference design/schematics, applications notes- Involved in industry standards consortium including SNIA, PCI-SIG and NVMe Technical Working Group- Performance measurement and analysis of enterprise storage products- Provides architecture review and optimization for customers designing with enterprise storage products- Hardware debug to reproduce issues; with root cause analysis- Programming, scripting, automation, and data collection: Tcl, Python, C / C++ and Perl- Interfacing HW with SW/FW through I2C, TWI, SPI, and JTAG- Design and architect functional test plans, derive and optimize test methodologies and generate test reports- Software and firmware integration between device / board, hardware and lab equipment- Cadence design tools and PCIe Compliance Test Suite- Authored 8 technical papers published in refereed journalsOutstanding Achievement Awards:- PMC-Sierra Innovation and Achievement Award- PMC-Sierra Spotlight Awards- Natural Sciences and Engineering Research Council of Canada (NSERC) Scholarship - Canada Governor General's Academic Bronze Medal
Nvidia
View- Website:
- nvidia.com
- Employees:
- 18356
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Senior Applications Engineer, Data Center ProductsNvidia Nov 2021 - PresentSan Francisco Bay Area
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Technical Lead, Applications EngineeringMicrochip Technology Inc. Mar 2019 - Nov 2021Burnaby, British Columbia, Canada- Tier-1 Customer Support for Microchip 24G SAS Controllers, Expanders, and PCIe Gen4 Switching Devices- Provide technical support and responsible for maintaining major Tier-1 storage customer accounts in Asia and North America- Architect system level solutions by leveraging company’s storage devices to help customers build next generation storage systems to support growth in “Internet of Things”- Responsible for both hardware designs & system-level integration, pre-sale and post-sale customer technical training, and customer issue resolutions.- Drive customer issues to closure by working with internal development, validation, and marketing cross-functional teams. Devise internal debugging strategies and communication plans for customers.- Provide technical guidance to internal teams and lead overall customer management plan- Handle critical escalations and act as the main interface between the company and customers- Authored Technical Application Notes and White-papers on SAS and PCIe Storage Technologies- Application Notes on PCIe Gen3 Compliance Testing and Certification- Participated in Industry Standards Consortiums and Events: NVMe Technical Group, PCI-SIG Compliance Group, SNIA SAS Plugfest, Computex -
Technical Leader, Applications EngineerMicrosemi Corporation Feb 2017 - Mar 2019Burnaby, British Columbia, Canada- Tier-1 Customer Support for Microsemi 12G SAS Controllers, Expanders, and PCIe Gen3 Switching Devices- Provide technical support and responsible for maintaining major Tier-1 storage customer accounts in Asia and North America- Architect system level solutions by leveraging company’s storage devices to help customers build next generation storage systems to support growth in “Internet of Things”- Responsible for both hardware designs & system-level integration, pre-sale and post-sale customer technical training, and customer issue resolutions.- Drive customer issues to closure by working with internal development, validation, and marketing cross-functional teams. Devise internal debugging strategies and communication plans for customers.- Provide technical guidance to internal teams and lead overall customer management plan- Handle critical escalations and act as the main interface between the company and customers- Authored Technical Application Notes and White-papers on SAS and PCIe Storage Technologies- Application Notes on PCIe Gen3 Compliance Testing and Certification- Participated in Industry Standards Consortiums and Events: NVMe Technical Group, PCI-SIG Compliance Group, SNIA SAS Plugfest, Computex -
Staff Applications EngineerMicrosemi Corporation Jan 2016 - Jan 2017Burnaby, Bc- Tier-1 Customer Support for Microsemi 6G & 12G SAS Controllers and Expanders- Provide technical support and responsible for maintaining major Tier-1 storage customer accounts in Asia and North America- Architect system level solutions by leveraging company’s storage devices to help customers build next generation storage systems to support growth in “Internet of Things”- Responsible for both hardware designs & system-level integration, pre-sale and post-sale customer technical training, and customer issue resolutions.- Drive customer issues to closure by working with internal development, validation, and marketing cross-functional teams. Devise internal debugging strategies and communication plans for customers.- Provide technical guidance to internal teams and lead overall customer management plan- Handle critical escalations and act as the main interface between the company and customers- Authored Technical Application Notes and White-papers on SAS and PCIe Storage Technologies- Application Notes on PCIe Gen3 Compliance Testing and Certification- Participated in Industry Standards Consortiums and Events: PCI-SIG Compliance Group, SNIA SAS Plugfest
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Staff Applications EngineerPmc-Sierra Is Now Microsemi Nov 2012 - Jan 2016Burnaby, Bc- Tier-1 Customer Support for PMC-Sierra 6G & 12G SAS Controllers and Expanders- Provide technical support and responsible for maintaining major Tier-1 storage customer accounts in Asia and North America- Architect system level solutions by leveraging company’s storage devices to help customers build next generation storage systems to support growth in “Internet of Things”- Responsible for both hardware designs & system-level integration, pre-sale and post-sale customer technical training, and customer issue resolutions.- Drive customer issues to closure by working with internal development, validation, and marketing cross-functional teams. Devise internal debugging strategies and communication plans for customers.- Provide technical guidance to internal teams and lead overall customer management plan- Handle critical escalations and act as the main interface between the company and customers- Authored Technical Application Notes and White-papers on SAS and PCIe Storage Technologies- Application Notes on PCIe Gen3 Compliance Testing and Certification- Participated in Industry Standards Consortiums and Events: PCI-SIG Compliance Group, SNIA SAS Plugfest -
Staff System Validation EngineerPmc-Sierra Is Now Microsemi Apr 2007 - Oct 2012Burnaby, British Columbia, Canada- PCI Express Validation Lead for PMC-Sierra SRCv-family devices- Design, execute and lead PCIe-subsystem validation effort and feature test plan- Responsible for industry’s first interoperability testing with major OEMs using PMC’s PCIe Gen3 Storage Controller product.- Provide PCIe and board level support for both internal teams and external customers/partners - PMC-Sierra Internal Validation Board Design, including: PMC-Sierra SAS/SATA Storage Expander Feature Validation and Signal Validation Boards, PMC-Sierra SAS/SATA Storage Controller and RAID Adapter Feature Validation and Signal Validation Boards, Supercapacitor-Green Backup Module for SRCv-family devices, SAS Port Switcher for emulating hot-plug and hot-removal testing, and FPGA and CPLD Design for FVB and SVB boards- SAS/SATA Validation for PMC-Sierra SAS/SATA Storage Controller and Expander devices- Implemented and executed SAS/SATA-subsystem validation, including phy, link and transportlayers, and on both hardware and firmware level- Acted as liaison between disk vendors, responsible for SAS bring-up effort and internal support to other PMC teams- Knowledgeable in using PCIe/SAS/SATA protocol analyzers, logic analyzer, exercisers and jammers.- Experienced in GreenHills probe and MULTI firmware development platform- Received five PMC Spotlight Awards between April 2007 to November 2012
David P. Education Details
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First-Class Honours
Frequently Asked Questions about David P.
What company does David P. work for?
David P. works for Nvidia
What is David P.'s role at the current company?
David P.'s current role is Senior Applications Engineer, Data Center Products.
What schools did David P. attend?
David P. attended Simon Fraser University.
Who are David P.'s colleagues?
David P.'s colleagues are Uthra Natarajan, William Wang, Josephine Chang, Mba, Shikhar Solanki, Pinshan Jiang, Alfred Junklewitz, Sowmya Pidakala.
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