David Thach Email & Phone Number

Paris, Île-De-France, France

Paris Area, France

SAS Fermat is a start-up company that develops cutting-edge FPGA-based hardware solutions backed with massive flash storage to boost Big-Data processing.* Oversee the development of the entire software stack. Continuously advocate for high-quality code through meticulous peer reviews using Git tools.* Review and profile software stack to identify and solve performance bottlenecks.* Relentlessly strive for optimal performance through active contributions to hardware/software co-design.* Develop the bare-metal firmware coded in C language that executes on the ARM processors embedded in Xilinx Zynq System-On-Chip that controls the Fermat module - a PCIe card mounted with a large amount of NVMe flash storage devices.* Contribute to the hardware prototyping and validation effort by developing software testing tools and environments.* Developed several proofs of concepts for banks and data storage manufacturers. Successfully achieved a 118x speed-up on a climate image processing application.* Contribute to the roadmap planning effort and assist the business development team.* Wrote specifications of key features of the Fermat product and implemented them.* Validated Fermat's early-stage concept by implementing and benchmarking state-of-the-art alternatives using the Amazon Web Services (AWS) platform. Demonstrated a 300x performance improvement with pure data analytics applications.* Recruited and built the current software development team. Facilitated integration of each new member.* Conduct technical review meetings frequently.

Kawasaki, Kanagawa, Japan

* Investigated and benchmarked various application acceleration methodologies leveraging specialized hardware such as GPUs and FPGAs to uncover business opportunities.* Investigated High-Level Synthesis (HLS) techniques as a method to unlock FPGA processors' potential for software developers.* Managed two teams of engineering contractors: one team focused on the identification of limitations of HLS techniques in terms of performance, the other focused on developing high-performance prototypes.* Collaborated closely with Intel Altera (renamed PSG) and Falcon Computing Solutions (acquired by Xilinx in 2020) in the development of toolchains to automatize the porting of software functions onto acceleration hardware such as GPUs and FPGAs.* Created training material to educate Fujitsu software developers regarding FPGA acceleration opportunities and integration process.

Kawasaki, Kanagawa, Japan

* Researched System-On-Chip verification methodologies to accelerate the development process of new chips and minimize the time-to-market.* Contributed to the success of Fujitsu's "K" super-computer in the race to claim top position in the TOP500 Supercomputer ranking in June 2011 - implemented the verification environment that boosted the validation of the interconnect chip design.* Developed a fast and accurate CPU cycle simulator for ARM Cortex-A8 applications. This simulator aims at providing performance estimations to facilitate software optimization at a very early stage in development.* Awarded with the Best Paper Award at the Design Automation Symposium 2012 for the work presented in 2011: Fast cycle estimation methodology for instruction-level emulator.

Kawasaki, Kanagawa, Japan

* Researched the Open Verification Methodology (OVM) - a new method to build reusable and automated verification environments to validate electronic designs. * Developed a verification environment prototype based on OVM and contributed to its integration in the chip development flow in the company.

Msc, Electronics And Real-Time Embedded Systems

Activities and Societies: School Soccer Team* Graduated with honors. * Awarded with the Prix du Parcours d’Excellence ESIEE Paris.

Exchange Student, Electrical Engineering

Activities and Societies: International Student Center Staff, Japan ClubStudy-abroad program focused on the design project of a wireless.

Bachelor Of Science, Electrical Engineering

Activities and Societies: Treasurer at the Student's Office* Graduated with honors. * Undergraduate research in Japan (Kogakuin.